LASCAS2021: 12TH IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS
PROGRAM

Days: Monday, February 22nd Tuesday, February 23rd Wednesday, February 24th Thursday, February 25th

Monday, February 22nd

View this program: with abstractssession overviewtalk overview

11:00-12:00Break
12:00-14:00 Session 4A: ADCs and DACs
12:00
Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX (abstract)
12:15
Comparative Study on Pre-Distortion/Calibration Methods for Current-Steering Digital-to-Analog Converters (abstract)
12:30
Linearization for High Speed Current-Steering DACs Using Neural Networks (abstract)
12:45
Systematic high-level design of a fifth order Continuous-Time CRFF Delta Sigma ADC (abstract)
13:00
A Redundancy-based Background Calibration for Comparator Offset/Threshold and DAC gain in a Ping-Pong SAR ADC (abstract)
13:15
Quantitative Jitter Simulations and FIR-DAC sizing for Single-Bit Continuous Time Sigma Delta Modulators (abstract)
12:00-14:00 Session 4B: RF Circuits and Systems
12:00
Reconfigurable E-band Receiver Development for Joint Communication and Sensing (abstract)
12:15
An ISM-Band Multi-Phase Injection-Locked Ring Oscillator (abstract)
12:30
A strategy to achieve competitive performance in basic RF LNAs (abstract)
12:45
A Novel Down Conversion Mixer with Low/High Band Re-configurable Transconductance Amplifier in 65nm CMOS Process (abstract)
13:00
Ultra Low Power < 9nW Adaptive Duty Cycling Oscillator in 22nm FDSOI CMOS Technology using Back Gate Biasing (abstract)
13:15
28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer (abstract)
12:00-14:00 Session 4C: Biomedical Circuits and Systems
12:00
Assessment of key parameters in a microwave imaging system design for breast cancer detection (abstract)
12:15
An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing (abstract)
12:30
Design of a Constant Current Laser Driver for Biomedical Applications (abstract)
12:45
Accelerating the base-level alignment step of DNA assembling in Minimap2 Algorithm using FPGA (abstract)
13:00
Residual Impedance Impact on MAX30001 Accuracy for Bioimpedance Applications (abstract)
12:00-14:00 Session 4D: Signal, Image and Video Processing
12:00
Low-Power Compensated Modified Comb Decimation Structure for Power-of-Two Decimation Factors (abstract)
12:15
Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding (abstract)
12:30
Non-memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks (abstract)
12:45
Towards analog computing devices for matrix algebraic problems (abstract)
13:00
A Brazilian Sign Language Gesture Recognizing System Using Gait Energy Image (abstract)
Tuesday, February 23rd

View this program: with abstractssession overviewtalk overview

11:00-12:00Break
12:00-14:00 Session 9A: Analog and Mixed Signal Circuits and Systems
12:00
Femto-Watt CMOS Voltage Reference Design (abstract)
12:15
Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits (abstract)
12:30
A 1V, 450pS OTA Based on Current-Splitting and Modified Series-Parallel Mirrors (abstract)
12:45
On-chip Diffusion Charge Redistribution Ladder Converter for Photovoltaic Systems with Mismatch (abstract)
13:00
ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications (abstract)
13:15
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations (abstract)
12:00-14:00 Session 9B: Security, AI, and Asynchronous Techniques
12:00
A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators (abstract)
12:15
Design Considerations for the Development of Computational Resistive Memories (abstract)
12:30
A New QDI Asynchronous Pipeline with Two-Phase Delay-Insensitive Global Communication (abstract)
12:45
Chronos: an Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution (abstract)
13:00
FPGA Implementation of a New PUF Based on Galois Ring Oscillators (abstract)
13:15
Hardware Trojan with Frequency Modulation (abstract)
12:00-14:00 Session 9C: Sensor Circuits and Systems
12:00
A Wearable Wireless Sensing System for Capturing Human Arm Motion (abstract)
12:15
Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing (abstract)
12:30
Estimating Cole-Impedance Parameters from Limited Frequency-Band Impedance Measurements (abstract)
12:45
Design and implementation of a trans-impedance amplifier for a miniaturized saturated absorption spectrometer (abstract)
13:00
Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops (abstract)
Wednesday, February 24th

View this program: with abstractssession overviewtalk overview

11:00-12:00Break
12:00-14:00 Session 15A: Wired and Optical Communications
12:00
Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers (abstract)
12:15
An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers (abstract)
12:30
Background Compensation of Frequency Interleaved DAC for Optical Transceivers (abstract)
12:45
Novel Noise Reduction Technique using Multiple Photodiodes in Optical Receivers for POF Communications (abstract)
12:00-14:00 Session 15B: Test, Fault Tolerance and Reliability
12:00
The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network (abstract)
12:15
Soft Error Sensibility Window at FinFET DICE SRAM (abstract)
12:30
A JTAG-based Fault Emulation Platfrom for Dependability Analyses of Processor-based ASICs (abstract)
12:45
On-Chip Area and Test Time Effective Weak Resistive Open Defect Detection Technique for Cache Memory (abstract)
13:00
Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit (abstract)
13:15
Current Behavior on Process Variability AwareFinFET Inverter Designs (abstract)
12:00-14:00 Session 15C: Techniques for Applied Wireless Communications
12:00
Monitoring adjustment based on current data of an IoT-COTS monitor for environmental chemical analysis (abstract)
12:15
Edge Computing Technique for a 87% Energy Saving for IoT Device Dedicated to Environmental Monitoring (abstract)
12:30
Robust Passive Coherent Location via Nonlinearly Constrained Least Squares (abstract)
12:45
FPGA Implementation of Stair Matrix based Massive MIMO Detection (abstract)
Thursday, February 25th

View this program: with abstractssession overviewtalk overview

11:00-12:00Break
12:00-14:00 Session 21A: Digital Techniques for Emerging Applications
12:00
High-Speed and Low-Energy Dual-Mode Logic based Single-Clock-Cycle Binary Comparator (abstract)
12:15
EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors (abstract)
12:30
Electrical Evaluation of Logic Network Generation Methods for Supergates using SwitchCraft (abstract)
12:45
A Light-Weight Timing Resilient Scheme for Near-Threshold Efficient Digital ICs (abstract)
13:00
Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures (abstract)
13:15
A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders (abstract)
12:00-14:00 Session 21B: Power and Energy Circuits and Systems
12:00
A Library of High-Level Models for the Simulation of DC-DC Converters (abstract)
12:15
RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies (abstract)
12:30
On the Possibility to Use Energy Harvesting on Beta Radiation in Nuclear Environments (abstract)
12:45
A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS (abstract)
12:00-14:00 Session 21C: Electronic Design Automation and Digital Circuit Design
12:00
High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring (abstract)
12:15
Reliability Analysis in Less than 200 Lines of Code (abstract)
12:30
A CMOS Implementation of the Tent Map for Random Number Generation (abstract)
12:45
Benchmarking Open Access VLSI Partitioning Tools (abstract)
13:00
TailoredCore: Generating Application-Specific RISC-V-based Cores (abstract)
13:15
Analog and RF Circuit Constrained Optimization Using Multi-Objective Evolutionary Algorithms (abstract)