Talk Author Index

TALK AUTHOR INDEX

Shortcuts: A B C D E F G H I J K L M N O P Q R S T V W Y Z Á

A
Abich, Geancarlo	The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network
Achjian, Renan W.	Accelerating the base-level alignment step of DNA assembling in Minimap2 Algorithm using FPGA
Acurio, Eliana	RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
Agius, Mark	A Wearable Wireless Sensing System for Capturing Human Arm Motion
Agostini, Luciano	Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding
Albreem, Mahmoud A.	FPGA Implementation of Stair Matrix based Massive MIMO Detection
Aldea, Concepción	Novel Noise Reduction Technique using Multiple Photodiodes in Optical Receivers for POF Communications
Allier, Emmanuel	Quantitative Jitter Simulations and FIR-DAC sizing for Single-Bit Continuous Time Sigma Delta Modulators
Almeida, Sérgio	An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures
Amory, Alexandre	A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators
Andjelkovic, Marko	Reliability Analysis in Less than 200 Lines of Code
Apolinário, José	Robust Passive Coherent Location via Nonlinearly Constrained Least Squares
Aragão, Alexandre	Assessment of key parameters in a microwave imaging system design for breast cancer detection
Araujo, Gabriel	A Brazilian Sign Language Gesture Recognizing System Using Gait Energy Image
Arno, Patrick	Quantitative Jitter Simulations and FIR-DAC sizing for Single-Bit Continuous Time Sigma Delta Modulators
Asprilla, Andrés	28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer
Attard, Joe	A Wearable Wireless Sensing System for Capturing Human Arm Motion
Aznar, Francisco	A strategy to achieve competitive performance in basic RF LNAs
B
Bampi, Sergio	An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders
Bar-Lev, Sharon	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Barbosa, Ana C. A.	On-chip Diffusion Charge Redistribution Ladder Converter for Photovoltaic Systems with Mismatch
Barekar, Sheetal	On-Chip Area and Test Time Effective Weak Resistive Open Defect Detection Technique for Cache Memory
Barreto, André Noll	Reconfigurable E-band Receiver Development for Joint Communication and Sensing
Baschirotto, Andrea	A Library of High-Level Models for the Simulation of DC-DC Converters Quantitative Jitter Simulations and FIR-DAC sizing for Single-Bit Continuous Time Sigma Delta Modulators
Batista, Gracieth	A New QDI Asynchronous Pipeline with Two-Phase Delay-Insensitive Global Communication
Beauchamp, Daniel	Linearization for High Speed Current-Steering DACs Using Neural Networks
Becker, Juergen	High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring
Berk, Mustafa Sedat	An ISM-Band Multi-Phase Injection-Locked Ring Oscillator
Blank, Tanya	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Bonizzoni, Edoardo	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Breitenreiter, Anselm	Reliability Analysis in Less than 200 Lines of Code Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops
Brendler, Leonardo H.	Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit
Brouk, Igor	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Bruno, Giuseppe	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Bucolo, Maide	Towards analog computing devices for matrix algebraic problems
Bunsen, Keigo	A Redundancy-based Background Calibration for Comparator Offset/Threshold and DAC gain in a Ping-Pong SAR ADC
Buscarino, Arturo	Towards analog computing devices for matrix algebraic problems
Butzen, Paulo F.	Soft Error Sensibility Window at FinFET DICE SRAM Benchmarking Open Access VLSI Partitioning Tools
C
Caggiani Luizelli, Marcelo	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Carrasquilla-Batista, Arys	Monitoring adjustment based on current data of an IoT-COTS monitor for environmental chemical analysis
Castagna, Maria Eloisa	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Castellanos, Juan C.	On-chip Diffusion Charge Redistribution Ladder Converter for Photovoltaic Systems with Mismatch
Castro-Godínez, Jorge	TailoredCore: Generating Application-Specific RISC-V-based Cores
Celma, Santiago	A strategy to achieve competitive performance in basic RF LNAs Novel Noise Reduction Technique using Multiple Photodiodes in Optical Receivers for POF Communications FPGA Implementation of a New PUF Based on Galois Ring Oscillators
Chau, Wang J.	Accelerating the base-level alignment step of DNA assembling in Minimap2 Algorithm using FPGA
Chugg, Keith	Linearization for High Speed Current-Steering DACs Using Neural Networks
Cops, Wim	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers
Cordova, David	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers 28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer
Correa, Guilherme	Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding
Correa, Marcel	Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding
Costa, Eduardo	Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures
Craninckx, Jan	A Redundancy-based Background Calibration for Comparator Offset/Threshold and DAC gain in a Ping-Pong SAR ADC
Crespi, Lorenzo	A Library of High-Level Models for the Simulation of DC-DC Converters
Critcher, Shelby	Estimating Cole-Impedance Parameters from Limited Frequency-Band Impedance Measurements Residual Impedance Impact on MAX30001 Accuracy for Bioimpedance Applications
D
da Costa, Eduardo	An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders
da Rosa Jr., Leomar	Electrical Evaluation of Logic Network Generation Methods for Supergates using SwitchCraft
Danigno, Marcelo	Benchmarking Open Access VLSI Partitioning Tools
Daubie, Evelyne	On the Possibility to Use Energy Harvesting on Beta Radiation in Nuclear Environments
de Melo Hang, Maria Eduarda	Soft Error Sensibility Window at FinFET DICE SRAM
De Smedt, Valentijn	Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits
Dermit, Davide	A Redundancy-based Background Calibration for Comparator Offset/Threshold and DAC gain in a Ping-Pong SAR ADC
Deval, Yann	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers 28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer
Dualibe, Fortunato Carlos	On the Possibility to Use Energy Harvesting on Beta Radiation in Nuclear Environments
Duarte, Gabriel	A New QDI Asynchronous Pipeline with Two-Phase Delay-Insensitive Global Communication
Dutta, Ashudeb	A Novel Down Conversion Mixer with Low/High Band Re-configurable Transconductance Amplifier in 65nm CMOS Process
Díez-Señorans, Guillermo	FPGA Implementation of a New PUF Based on Galois Ring Oscillators
E
Ellinger, Frank	Ultra Low Power < 9nW Adaptive Duty Cycling Oscillator in 22nm FDSOI CMOS Technology using Back Gate Biasing
Ergün, Salih	A CMOS Implementation of the Tent Map for Random Number Generation
Escobar, Ricardo	High-Speed and Low-Energy Dual-Mode Logic based Single-Clock-Cycle Binary Comparator
F
Failache, Horacio	Design and implementation of a trans-impedance amplifier for a miniaturized saturated absorption spectrometer
Ferhanoglu, Onur	Design of a Constant Current Laser Driver for Biomedical Applications
Fernandez Bocco, Alvaro	An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers
Ferreira, Guilherme	A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders
Ferreira, Guilherme	Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures
Ferré, Guillaume	Edge Computing Technique for a 87% Energy Saving for IoT Device Dedicated to Environmental Monitoring
Fettweis, Gerhard P.	Reconfigurable E-band Receiver Development for Joint Communication and Sensing
Fey, Dietmar	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
Finkenauer, Plínio	Electrical Evaluation of Logic Network Generation Methods for Supergates using SwitchCraft
Floridia, Andrea	A JTAG-based Fault Emulation Platfrom for Dependability Analyses of Processor-based ASICs
Fortuna, Luigi	Towards analog computing devices for matrix algebraic problems
Foucaud, Laura	Edge Computing Technique for a 87% Energy Saving for IoT Device Dedicated to Environmental Monitoring
França, Alexandre B. Z.	Non-memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks
Frasca, Mattia	Towards analog computing devices for matrix algebraic problems
Freeborn, Todd	Estimating Cole-Impedance Parameters from Limited Frequency-Band Impedance Measurements Residual Impedance Impact on MAX30001 Accuracy for Bioimpedance Applications
Fritscher, Markus	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
G
Galetto, Agustin C.	Background Compensation of Frequency Interleaved DAC for Optical Transceivers
Garcia-Bosque, Miguel	FPGA Implementation of a New PUF Based on Galois Ring Oscillators
George, Sandra	Reconfigurable E-band Receiver Development for Joint Communication and Sensing
Ghimouz, Abderrahmane	Systematic high-level design of a fifth order Continuous-Time CRFF Delta Sigma ADC
Gois, Jonathan	A Brazilian Sign Language Gesture Recognizing System Using Gait Energy Image
Gomes, José Gabriel R. C.	Non-memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks
González-Gómez, Jeferson	TailoredCore: Generating Application-Specific RISC-V-based Cores
Gupta, Nisha	A Novel Down Conversion Mixer with Low/High Band Re-configurable Transconductance Amplifier in 65nm CMOS Process
H
Henkel, Jörg	TailoredCore: Generating Application-Specific RISC-V-based Cores
Hernandez, Hugo	ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications
Hernández-Alpizar, Laura	Monitoring adjustment based on current data of an IoT-COTS monitor for environmental chemical analysis
Hoppe, Augusto	High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring
Hueda, Mario R.	An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers Background Compensation of Frequency Interleaved DAC for Optical Transceivers
I
Inam, Benan Beril	An ISM-Band Multi-Phase Injection-Locked Ring Oscillator
J
Joram, Niko	Ultra Low Power < 9nW Adaptive Duty Cycling Oscillator in 22nm FDSOI CMOS Technology using Back Gate Biasing
Jovanovic Dolecek, Gordana	Low-Power Compensated Modified Comb Decimation Structure for Power-of-Two Decimation Factors
Juntti, Markku	FPGA Implementation of Stair Matrix based Massive MIMO Detection
Juracy, Leonardo	A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators
K
Karmakar, Arijit	Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits
Kastensmidt, Fernanda	High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit
Kessler, Henrique	Electrical Evaluation of Logic Network Generation Methods for Supergates using SwitchCraft
Khan, Zaheer	FPGA Implementation of Stair Matrix based Massive MIMO Detection
Kizas, Thomas Eleftherios Dimitrios	A Library of High-Level Models for the Simulation of DC-DC Converters
Knödtel, Johannes	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
Krstic, Milos	Reliability Analysis in Less than 200 Lines of Code Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops
Kızmaz, Muhammed Mustafa	A CMOS Implementation of the Tent Map for Random Number Generation
L
Lanuzza, Marco	High-Speed and Low-Energy Dual-Mode Logic based Single-Clock-Cycle Binary Comparator
Lanuzza, Marco	RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
Lapuyade, Herve	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers 28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer
Leroux, Paul	Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits
Lima, Amaro	A Brazilian Sign Language Gesture Recognizing System Using Gait Energy Image
Lindner, Bastian	Ultra Low Power < 9nW Adaptive Duty Cycling Oscillator in 22nm FDSOI CMOS Technology using Back Gate Biasing
Lorenzon, Arthur	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Luft, Ash	Hardware Trojan with Frequency Modulation
M
M. de la Rosa, Jose	Low-Power Compensated Modified Comb Decimation Structure for Power-of-Two Decimation Factors
Macedo Azevedo da Rosa, Morgana	An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing
Malcovati, Piero	A Library of High-Level Models for the Simulation of DC-DC Converters Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Mali, Madan	On-Chip Area and Test Time Effective Weak Resistive Open Defect Detection Technique for Cache Memory
Mallah, Maen	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
Marchezan, Geaninne	Chronos: an Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution
Marcon, César	Chronos: an Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution
Marques, Cleiton M.	Soft Error Sensibility Window at FinFET DICE SRAM
Marques, Sandro Matheus	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Martens, Ewout	A Redundancy-based Background Calibration for Comparator Offset/Threshold and DAC gain in a Ping-Pong SAR ADC
Martinez-Martinez, Pedro A.	A strategy to achieve competitive performance in basic RF LNAs
Martins, Tarciso	ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications
Martins, Wallace	Robust Passive Coherent Location via Nonlinearly Constrained Least Squares
Martínez-Pérez, Antonio D.	A strategy to achieve competitive performance in basic RF LNAs
McGuire, Michael	Hardware Trojan with Frequency Modulation
Medeiros, Thiarles Soares	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Meinhardt, Cristina	Soft Error Sensibility Window at FinFET DICE SRAM Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit Current Behavior on Process Variability AwareFinFET Inverter Designs
Moeyaert, Véronique	On the Possibility to Use Energy Harvesting on Beta Radiation in Nuclear Environments
Moisello, Elisabetta	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Moraes, Fernando	A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators Chronos: an Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution
Moraes, Leonardo	Current Behavior on Process Variability AwareFinFET Inverter Designs
Morche, Dominique	Quantitative Jitter Simulations and FIR-DAC sizing for Single-Bit Continuous Time Sigma Delta Modulators
Moreira, Mathues	A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators
Morero, Damian A.	An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers Background Compensation of Frequency Interleaved DAC for Optical Transceivers
Muñoz, Marcello	Electrical Evaluation of Logic Network Generation Methods for Supergates using SwitchCraft
N
Nedjah, Nadia	Non-memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks
Nemirovsky, Yael	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Neto, Luiz	Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding
Nicolalde, Daniel	Robust Passive Coherent Location via Nonlinearly Constrained Least Squares
Nodenot, Nicolas	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers
Noije, Wilhelmus	Assessment of key parameters in a microwave imaging system design for breast cancer detection ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications
O
Oliveira, Duarte	A New QDI Asynchronous Pipeline with Two-Phase Delay-Insensitive Global Communication
Oliveira, Fernanda D. V. R.	Non-memoryless vs. Memoryless Hardware Architectures for Convolutional Neural Networks
Oliveira, Isadora	Benchmarking Open Access VLSI Partitioning Tools
Olivera, Fabián	Femto-Watt CMOS Voltage Reference Design A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS
Oreggioni, Julián	Design and implementation of a trans-impedance amplifier for a miniaturized saturated absorption spectrometer
Orna, Marco	Quantitative Jitter Simulations and FIR-DAC sizing for Single-Bit Continuous Time Sigma Delta Modulators
Ost, Luciano	The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network
P
Paim, Guilherme	An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing
Paim, Guilherme	Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders
Palomino, Daniel	Exploring Operation Sharing in Directional Intra Frame Prediction of AV1 Video Coding
Passos, Wesley	A Brazilian Sign Language Gesture Recognizing System Using Gait Energy Image
Pechmann, Stefan	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
Pereira, Pedro	Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures
Pereira, Pedro T. L.	A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders
Petraglia, Antonio	Femto-Watt CMOS Voltage Reference Design A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS
Piccin, Yohan	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers
Pinheiro Jr., Carlos A.	A Three-Stage Charge Pump with Forward Body Biasing in 28 nm UTBB FD-SOI CMOS
Pinto, Felipe	Design Considerations for the Development of Computational Resistive Memories
Ponce, David	Assessment of key parameters in a microwave imaging system design for breast cancer detection
Pontes, Diego	ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications
Procel, Luis-Miguel	RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
Prócel, Luis Miguel	High-Speed and Low-Energy Dual-Mode Logic based Single-Clock-Cycle Binary Comparator
Q
Quenon, Alexandre	On the Possibility to Use Energy Harvesting on Beta Radiation in Nuclear Environments
R
Ramos Rodrigues, Cesar	A 1V, 450pS OTA Based on Current-Splitting and Modified Series-Parallel Mirrors
Rarbi, Fatah-Ellah	Systematic high-level design of a fifth order Continuous-Time CRFF Delta Sigma ADC
Reichenbach, Marc	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
Reis, Ricardo	The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network Benchmarking Open Access VLSI Partitioning Tools Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit Current Behavior on Process Variability AwareFinFET Inverter Designs
Reiser, Daniel	Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
Reyes, Benjamin T.	Background Compensation of Frequency Interleaved DAC for Optical Transceivers
Reyes, Benjamin T.	An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers
Reyes, David	ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications
Rivadeneira, David	RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
Rivet, Francois	Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX Design Methodology for 112Gb/s PAM4 Wireline ADC-Based Receivers Edge Computing Technique for a 87% Energy Saving for IoT Device Dedicated to Environmental Monitoring 28nm FDSOI Ultra Low Power 1.5-2.0 GHz Factorial-DLL Frequency Synthesizer
Rodovalho, Luis Henrique	A 1V, 450pS OTA Based on Current-Splitting and Modified Series-Parallel Mirrors
Rojas-González, Jonathan	TailoredCore: Generating Application-Specific RISC-V-based Cores
Rossetto, Olivier	Systematic high-level design of a fifth order Continuous-Time CRFF Delta Sigma ADC
Rossi, Fábio	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Royo, Guillermo	A strategy to achieve competitive performance in basic RF LNAs Novel Noise Reduction Technique using Multiple Photodiodes in Optical Receivers for POF Communications
S
Salazar-García, Carlos	TailoredCore: Generating Application-Specific RISC-V-based Cores
Sanches, Bruno	Assessment of key parameters in a microwave imaging system design for breast cancer detection
Sanchez, Ernesto	A JTAG-based Fault Emulation Platfrom for Dependability Analyses of Processor-based ASICs
Sancho-Chavarria, Lilliana	Monitoring adjustment based on current data of an IoT-COTS monitor for environmental chemical analysis
Sanchotene Silva, Rafael	A 1V, 450pS OTA Based on Current-Splitting and Modified Series-Parallel Mirrors
Scerri, Jeremy	A Wearable Wireless Sensing System for Capturing Human Arm Motion
Schneider Beck Filho, Antonio Carlos	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Schrape, Oliver	Reliability Analysis in Less than 200 Lines of Code Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops
Schulze, Carsten	Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops
Schwingshackl, David	Comparative Study on Pre-Distortion/Calibration Methods for Current-Steering Digital-to-Analog Converters
Scicluna, Kris	A Wearable Wireless Sensing System for Capturing Human Arm Motion
Seguna, Clive	A Wearable Wireless Sensing System for Capturing Human Arm Motion
Seidel, Henrique	An Energy-Efficient Wavelet Haar Transform Architecture for Respiratory Signal Processing
Sen, Padmanava	Reconfigurable E-band Receiver Development for Joint Communication and Sensing
Shafique, Muhammad	TailoredCore: Generating Application-Specific RISC-V-based Cores
Shahabuddin, Mohammad Shahanewaz	FPGA Implementation of Stair Matrix based Massive MIMO Detection
Shahabuddin, Shahriar	FPGA Implementation of Stair Matrix based Massive MIMO Detection
Sima, Mihai	Hardware Trojan with Frequency Modulation
Singh, Shiv Govind	A Novel Down Conversion Mixer with Low/High Band Re-configurable Transconductance Amplifier in 65nm CMOS Process
Solis, Fredy	An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers
Sosa, Kevin	Design and implementation of a trans-impedance amplifier for a miniaturized saturated absorption spectrometer
Sotiriadis, Paul Peter	Analog and RF Circuit Constrained Optimization Using Multi-Objective Evolutionary Algorithms
Souza da Silva, Lucas	Femto-Watt CMOS Voltage Reference Design
Stephen-Cantillano, Andrés	TailoredCore: Generating Application-Specific RISC-V-based Cores
Sánchez-Azqueta, Carlos	Novel Noise Reduction Technique using Multiple Photodiodes in Optical Receivers for POF Communications FPGA Implementation of a New PUF Based on Galois Ring Oscillators
T
Taco, Ramiro	High-Speed and Low-Energy Dual-Mode Logic based Single-Clock-Cycle Binary Comparator
Taco, Ramiro	RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
Temel, Ozgur Deniz	Design of a Constant Current Laser Driver for Biomedical Applications
Teng, Carolina	Accelerating the base-level alignment step of DNA assembling in Minimap2 Algorithm using FPGA
Toledo, Mariana	EDP Optimization of Parallel Applications via CPU Frequency Scaling on AMD Processors
Tonello, Andrea	Comparative Study on Pre-Distortion/Calibration Methods for Current-Steering Digital-to-Analog Converters
Touloupas, Konstantinos	Analog and RF Circuit Constrained Optimization Using Multi-Objective Evolutionary Algorithms
Trojman, Lionel	High-Speed and Low-Energy Dual-Mode Logic based Single-Clock-Cycle Binary Comparator RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
V
V. Camargo, Vinícius	Electrical Evaluation of Logic Network Generation Methods for Supergates using SwitchCraft
Vaiana, Michele	Study of a Voltage-Mode Readout Configuration for Micromachined CMOS Transistors for Uncooled IR Sensing
Valet, Patrick	Comparative Study on Pre-Distortion/Calibration Methods for Current-Steering Digital-to-Analog Converters
Villegas, Marco	RF-DC Multiplier for RF Energy Harvester based in 32nm and TFET technologies
Vourkas, Ioannis	Design Considerations for the Development of Computational Resistive Memories
W
Weber, Iaçanã	Chronos: an Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution
Y
Yelten, Mustafa Berke	An ISM-Band Multi-Phase Injection-Locked Ring Oscillator Design of a Constant Current Laser Driver for Biomedical Applications
Z
Zeidler, Steffen	Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops
Zimpeck, Alexandra L.	Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit Current Behavior on Process Variability AwareFinFET Inverter Designs
Á
Ávila-Ardón, Steven	TailoredCore: Generating Application-Specific RISC-V-based Cores