TALK KEYWORD INDEX
This page contains an index consisting of author-provided keywords.
3 | |
3D IC | |
3D-stacked ICs | |
A | |
ABFT | |
access-time minimization | |
Accuracy | |
Adaptive testing | |
Alternate test | |
analog and mixed-signal validation | |
Analog circuits | |
Anomaly Detection | |
Asynchronous circuits | |
ATPG | |
Automatic test pattern generation | |
Automotive IC | |
automotive reliability | |
B | |
Bayesian Networks | |
bit error rate | |
broadcast | |
Built-In Self-Diagnostic | |
Built-in self-test | |
C | |
Compression | |
Concolic testing | |
Consulting | |
Control checkout | |
Core router system | |
Counterfeit Detection | |
coupling | |
coverage analysis | |
Cpk | |
critical area | |
D | |
Data Analytics | |
Data-Driven | |
debug methodology | |
defect based test | |
defect classification | |
Defect localization | |
Defect Oriented Test | |
Defect simulation | |
Defects | |
Design for testability | |
DFT | |
Diagnosis | |
dicing tape | |
dictionary based diagnosis | |
digital-to-analog-converters | |
DPPM Reduction | |
E | |
Electromagnetic Measurements | |
Emerging Non Volatile Memory | |
Endurance Test | |
extrapolated reconstruction | |
F | |
Fail log | |
Failure analysis | |
fault coverage | |
fault model | |
fault tolerance | |
Fault-Tolerant | |
faults | |
feature engineering | |
FinFET Technologies | |
frequency | |
functional broadside tests | |
functional diagnosis | |
Functional Safety | |
functional test sequences | |
G | |
Generative Model | |
H | |
Hardware Security | |
Hardware Trojan | |
Hardware Trojan Detection | |
hardware trojans | |
Health monitoring | |
high speed channels | |
high-speed signal interface test | |
HVM diagnosis | |
I | |
IDDT | |
IEEE 1687 | |
IJTAG | |
in-system automotive test | |
Instruction set characterization | |
integrity checking | |
Intra-cell diagnosis | |
IP Trust Verification | |
IR-Drop | |
Isometric compression | |
J | |
jitter | |
jitter injection | |
JTAG security | |
L | |
Logic BIST | |
Low power test | |
M | |
Machine Learning | |
Machine learning based test | |
Manufacturing yield | |
MEDA Biochips | |
memristor | |
micro-bumps | |
microprocessor debug | |
modeling | |
Modular Test | |
N | |
near-threshold technology | |
Netlist Transformation and Simplification | |
Neural network | |
Neural Networks | |
No-Touch Test | |
O | |
Objective Analysis | |
online scan diagnosis | |
Outlier screening | |
overtesting | |
P | |
parallel IJTAG design | |
partial scan | |
polynomial chaos theory | |
PPA | |
Pre-bond TSV test | |
Pre-silicon verification | |
Precharge half-buffer | |
Principal Component Analysis | |
process variation | |
production testing | |
PVT variation | |
Q | |
QA/QC | |
QoR | |
quality prediction | |
Query-based Attack | |
R | |
Read Failure | |
Resilience | |
Resolution | |
RRAM | |
RRAM-based computing system | |
S | |
scan diagnosis | |
Scan-based test | |
secure hash | |
segmented model | |
Self-adaptation | |
Self-calibration | |
Self-learning | |
SIC | |
Simulation | |
sinusoidal interference injection | |
SoC | |
SRAM diagnosis | |
static linearity testing | |
stressed eye testing | |
STT-MRAM | |
stuck-at faults | |
Supply Chain Security | |
switching activity | |
Symbolic execution | |
System Level Test | |
Systems Engineering | |
T | |
tape frame | |
Test | |
test access | |
Test data compression | |
Test generation | |
test quality | |
test scheduling | |
test time reduction | |
Testing | |
thinned wafer | |
Time-series analysis | |
Timing Aware CAT | |
Timing-based IC Camouflaging | |
TNS | |
Toggle Generator | |
transition delay faults | |
transition faults | |
trojan prevention method | |
trust | |
U | |
uSMILE | |
V | |
Variational autoencoder | |
Verification of test and debug circuitry | |
volume diagnosis | |
W | |
wafer probing | |
wireless cryptographic IC security | |
Write Failure | |
X | |
X-tolerance |