ABSTRACT. We present an industrial-grade solution for automated diagnosis of functional patterns failures. The solution has been successfully demonstrated and deployed on multiple products at Intel.

ABSTRACT. Techniques to maintain high diagnosis resolution are proposed based on a study conducted on multiple customer designs by varying compression ratios up to 400X.

ABSTRACT. In this paper, we present a novel approach to run scan diagnosis either on production testers directly or on a few compute machines in a high volume manufacturing (HVM) environment.

ABSTRACT. Traditional approaches of data dependent jitter estimation in nonlinear high-speed links can be extremely time consuming. Therefore, this paper proposes developing a surrogate model by using the Polynomial Chaos theory to expedite this process.

ABSTRACT. Monitoring core routers is essential to ensure high reliability. However, most operational data are unlabeled, necessitating the design of a self-learning framework that iteratively learns and identifies various health status.

ABSTRACT. This paper introduces a stressed eye testing module for 30-Gbps NRZ signals. It can inject calibrated random jitter, sinusoidal jitter, and sinusoidal interference. Calibration procedures for the module are also presented.

ABSTRACT. As the industry gears up to deploy 100Gb/Lambda for Data Center Interconnect to support the massive growth of data handling, new testing challenges are presented. Signal modulation is more complex, the frequency of signals increases, the signal margin decreases, the channel losses for connecting a DUT to the instrument becomes very critical. At-speed testing of 112GGbps components now requires new measurements capabilities and new instrumentation integration concepts.

ABSTRACT. System-Level Test has been used at AMD for multiple generations of microprocessors. This presentation will focus on core power & performance and high-speed I/Os coverage evolution over the years and the recent challenges as new power management features and higher speed I/Os require new test strategies without exploding test costs.

ABSTRACT. System-level testing (SLT) has become necessary to ensure reliable operation of ever more complex electronics-based systems. Yet the practice of SLT has not advanced much from the early days of functional test. With rising complexity, containing SLT cost while achieving higher quality is a major challenge. This talk will examine ideas and approaches to develop a comprehensive methodology to cost-effectively scale SLT with rising system complexity.

ABSTRACT. We present a high-coverage, X-tolerant LBIST solution which uses compressor/decompressor structures, including X-control logic, that have already been inserted in the design for scan-compression deterministic patterns.

ABSTRACT. The paper presents a compression scheme for in-system automotive test. It generates vectors by complementing scan slices of encodable patterns. The scheme provides significant trade-offs between area and time.

ABSTRACT. We propose a machine learning method using data-driven anomaly detection for functional safety of analog automotive circuits, with mining dynamic time series in-field data in the context of system operation.

ABSTRACT. It’s common practice today to have Alexa turn on a light or play music and get traffic information from Siri. These simple tasks are only just the beginning. Machine learning and Deep learning have enabled dramatic progress with vision recognition, and NLP. Industries can integrate these technologies into their existing business process and products and over time, enhance them with their own custom IP.

2019 will be a year of development for the AI assistant. In this paper, we outline an AI engineering assistance model with some early prototypes and use cases that could be applied to test systems, which we believe will not only make for a richer experience, it will improve engineering and production efficiency as well as enhance production floor security. By integrating both vision and NLP AI with products and software interfaces enabling simple voice and gesture commands, engineers would be able to tackle more complex engineering tasks. A first step could be enabling engineers to speak the most commonly performed commands as they interact with the test system thus freeing them up to focus on the task at hand. Vision recognition AI could be used to enhance production floor login security, which would be quite valuable during post yield analysis. As the AI learns and improves, it can begin assisting with test debug, content searches, and even test program development.

ABSTRACT. Data Analysis is an important tool for Test and Product Engineers to improve coverage, product quality and operational efficiency of the equipment. Automated test equipment generates a vast amount of data with respect to the part being tested and the system doing the testing. In parallel to the test industry, many other technology sectors have been adopting various forms of Artificial Intelligence or Machine Learning to analyze vast data sets for new insights. Is it possible to leverage these new techniques back into a test application? In this presentation we will discuss infrastructure for impacting quality of test and how machine learning fits into the framework.

ABSTRACT. For years the industry has been focused on the use of Adaptive Test techniques to streamline and focus our test efforts for maximum value (and minimum test times). With the advent of Neural Network techniques (i.e. AI) new possibilities are coming to light for focusing our vision on areas where improvements can provide value. This presentation provides an overview of Adaptive Test and Neural Network techniques and then shares a vision for merging the two techniques together in order to improve our device quality, reduce our cost of test, and automate the control of functions best left to the computers supporting us.