Talk Keyword Index

TALK KEYWORD INDEX

This page contains an index consisting of author-provided keywords.

Shortcuts: 1 2 4 A B C D E F G H I J K L M N O P Q R S T U V W Y

1
1/f	Impact of BOX scaling and ground plane on 1/f noise in FDSOI pMOSFET
1/f noise	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures Impact of neglecting the bias dependence of access resistances on DC and 1/f noise parameter extraction
1T1R	Study of the annealing effect on Al2O3-based 1T1R RRAM cell
2
2D Heterostuctures	Experimental Demonstration of 2D Core-Shell Junctionless FET
2D materials	Single Trap and Low Frequency 1/f Noise Modeling in MOSFETs with Dirac Materials or 2D Semiconductor Channel Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2 Orientation-engineered PtTe2 Schottky FETs for dopant-free advanced technology nodes Temperature Dependent Carrier Transport Mechanisms in WSe2
2D semiconductors	From FD-SOI to MoS2 MOSFETs: Coupling Mechanisms DFT based layered dielectric model for MoS2/SiO2 structure
2D-exfoliated materials	Improving the conductance ratio of mechanically-exfoliated MoS2 and WS2 based memristors
4
4H-SiC MOS	Vertical Capacitance and Edge-Field Engineering in 4H-SiC MOS Capacitors
A
Ab initio simulations	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene
Access resistance	Impact of source/drain dopant implantation and spike annealing on electrical parameters of 25 nm FDSOI n-MOSFETs Cryogenic DC and Low-Frequency Noise Investigation of Vertical Gate-All-Around Silicon Nanowire pMOSFET Arrays Impact of neglecting the bias dependence of access resistances on DC and 1/f noise parameter extraction
Activation	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
Activation Functions	Simulating the Impact of Activation Functions on the Performance of 1T1R RRAM-Based Neural Networks Under Cycle-to-Cycle Variability Conditions
Adaptive electronics	Enhancing Negative Differential Transconductance by Ultra-Thin Ge on SOI
AlGaN	Analysis of Self Heating in SiC-6H and Al2O3 Substrate Platforms with SiO2 Buried Oxide Integration on AlGaN HEMT
AlGaN/GaN HEMT	Optimization of Hybrid Source and Drain Extension Metal in AlGaN/GaN HEMTs: A Simulation and Experimental Study
Aluminum nitride	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
amorphous semiconductor	Absence of P-doping by Localized Acceptor Polarons in TeO2 Semiconductors
analog circuit	Co-Integration of Tunnel FET and FinFET for Hybrid LDO Circuit Design
Analog Circuit Design	Impact of Forksheet Transistor on Low-Dropout Regulator Performance
Analog resistive switching	Ultra-low power Ru/TiOx/TiN RRAM structures for applications in neuromorphic computing Area-Dependent Switching and Synaptic Behavior in Al/TiOx/TiN devices
analytical model	Analytical Modeling of Rectifiers for Radio-Frequency Energy Harvesting Impact of neglecting the bias dependence of access resistances on DC and 1/f noise parameter extraction
Annealing	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
Annealing-driven self-assembly	Implantation- and Bonding-Free Multilayer SOI Fabrication via Annealing–Oxidation
Architecture	A Scalable Time-Multiplexed Biasing Architecture for FDSOI Spin Qubits
artificial synapses	Improving the conductance ratio of mechanically-exfoliated MoS2 and WS2 based memristors
B
Back end of line (BEOL)	Band gap and Defects of AlScN ferroelectrics for BEOL non-volatile memories
Back-Enhanced SOI	Analysis and Optimization of a Planar SOI RFET for Dynamic Reconfigurable Logic
Back-gate biasing	From FD-SOI to MoS2 MOSFETs: Coupling Mechanisms
BEOL	DC characterization of BEOL metallic layers in silicon technologies for cryogenic microelectronics
BEOL integration	Low-temperature dielectric for BEOL integration of Si-based RFETs
Better drive current	The Ultimate Field Effect Transistor: GAIA MOSFET
Beyond Moore Electronics	Temperature Dependent Carrier Transport Mechanisms in WSe2
Beyond-CMOS	Ultra-low-power in-memory computing based on spin-orbit ferroelectric devices for artificial intelligence and logic
Beyond-CMOS electronics	Orientation-engineered PtTe2 Schottky FETs for dopant-free advanced technology nodes
Biasing	A Scalable Time-Multiplexed Biasing Architecture for FDSOI Spin Qubits
biaxial strain	Origin of ferroelectricity in HfO2/ZrO2 thin films without depolarization
bilayer PtTe2	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
biomolecule detection	A T-Shaped Nanocavity Junctionless FET for High-Sensitivity Biomolecule Detection in Medical Diagnostics
biosensor	A T-Shaped Nanocavity Junctionless FET for High-Sensitivity Biomolecule Detection in Medical Diagnostics
biosensors	SOI based Nanowire Field-Effect Transistor Biosensors with Diamond-Like Carbon Modification
Box Creep	BOX CREEP : A Mechanical Booster for Next-Generation FDSOI
C
Capacitance	Demonstration of the Novel Junctionless Complementary FET
Capacitors	Vertical Capacitance and Edge-Field Engineering in 4H-SiC MOS Capacitors
Carrier mobility	Impact of silicon thickness on the carrier mobility of 28 nm FDSOI MOSFET from room temperature to cryogenic regime
Carrier Transport Mechanisms	Temperature Dependent Carrier Transport Mechanisms in WSe2
CFET	Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
Channel-last integration	In-depth TCAD study of stacked MoS₂ channel FETs based on a channel-last integration
circuit failure	Dielectric BD in FDSOI Transistors: circuital compact model and Impact on digital Circuits
Circuit implementation	Ultra-low-power in-memory computing based on spin-orbit ferroelectric devices for artificial intelligence and logic
CMOS	Low-temperature dielectric for BEOL integration of Si-based RFETs ITO/TiW Contacts for Transparent FDSOI CMOS Electronic Structure of W-doped In2O3 BEOL Oxide Semiconductors
CMOS inverter	Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
CMOS technology	Experimental Nanosheet Transistors: Temperature and Inversion-Regime Effects on a Two-Stage Operational Transconductance Amplifier Impact of Vertical Nanowire VFET Structural Asymmetry on Static and Dynamic Performance of Two-Stage OTA
CNF/CMF model	Cryogenic DC and Low-Frequency Noise Investigation of Vertical Gate-All-Around Silicon Nanowire pMOSFET Arrays
Coefficient of Variation (CV)	Statistical Robustness Analysis of MOSFETs with Different Layout Styles Under Gamma Radiation Using the Coefficient of Variation
Compact model	Split MLP Architectures for Accurate Joint Modeling of drain and gate currents in FD-SOI Transistors Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures Bias-dependent contact resistance model in Graphene on-Insulator FETs A compact model of perovskite memristors inspired by the Stanford RRAM model
Compensation	Can resistivity increase with doping?
Complementary FET	Demonstration of the Novel Junctionless Complementary FET
Complementary FET (CFET)	Strategic Stress Engineering in CFETs: Monolithic vs. Sequential
Contact	Contact Punch-Through Failure Mitigation in Advanced FD-SOI Nodes
contact resistance	ITO/TiW Contacts for Transparent FDSOI CMOS Bias-dependent contact resistance model in Graphene on-Insulator FETs
Core-Shell Junctionless FET	Experimental Demonstration of 2D Core-Shell Junctionless FET
Corner Rounding	Non-Quasi Static Small Signal Model of a Nanosheet FET for High-Frequency Application: Capturing the Role of the Corner Rounding
Coupling	From FD-SOI to MoS2 MOSFETs: Coupling Mechanisms
Cryo-electronics	Relocating Dopants from Si to SiO2: About Fundamentals and Applications of Modulation Acceptor Doping of Silicon
CryoCMOS	A Scalable Time-Multiplexed Biasing Architecture for FDSOI Spin Qubits
Cryogenic	Impact of silicon thickness on the carrier mobility of 28 nm FDSOI MOSFET from room temperature to cryogenic regime Temperature Dependent Carrier Transport Mechanisms in WSe2
Cryogenic CMOS	Cryogenic RF Characterisation of Passive Components for VCO and PLL Design in P28 FD-SOI for Quantum Computing Applications Cryogenic DC and Low-Frequency Noise Investigation of Vertical Gate-All-Around Silicon Nanowire pMOSFET Arrays
cryogenic electronics	Interface-Engineered Cryogenic Memristors Enabling Sub-100 μV Scalable Qubit Biasing
Cryogenic memristors	Interface-Engineered Cryogenic Memristors Enabling Sub-100 μV Scalable Qubit Biasing
Cryogenic Temperature	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
cryogenic temperatures	Ultra-low threshold voltage shifts in passivated GaN-on-Si HEMTs under cryogenic operation Operation of Junctionless Nanowire Transistors-Based Common Source Current Mirror at Cryogenic Temperatures
Cryogenics	DC characterization of BEOL metallic layers in silicon technologies for cryogenic microelectronics
Current Mirror	Operation of Junctionless Nanowire Transistors-Based Common Source Current Mirror at Cryogenic Temperatures
current sensitivity	A T-Shaped Nanocavity Junctionless FET for High-Sensitivity Biomolecule Detection in Medical Diagnostics
Current Transfer Ratio	Operation of Junctionless Nanowire Transistors-Based Common Source Current Mirror at Cryogenic Temperatures
current-voltage characteristics	Ultra-low threshold voltage shifts in passivated GaN-on-Si HEMTs under cryogenic operation
Cycle to Cycle	Simulating the Impact of Activation Functions on the Performance of 1T1R RRAM-Based Neural Networks Under Cycle-to-Cycle Variability Conditions
D
DC Characterization	DC characterization of BEOL metallic layers in silicon technologies for cryogenic microelectronics
DDRFET	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
Deep Neural Network	Real Time Simulations of Advanced MOSFETs
defect physics	Absence of P-doping by Localized Acceptor Polarons in TeO2 Semiconductors
Defects	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
defects and stability	Electronic Structure of IGZO and its Hydrogen Defects
density functional theory	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
Density functional theory (DFT)	DFT based layered dielectric model for MoS2/SiO2 structure
depolarization effect	Origin of ferroelectricity in HfO2/ZrO2 thin films without depolarization
device dimensions	Impact of RDF in the channel on the On-current of GAA nanosheet transistors through Monte Carlo simulations
Device modelling	Mixed Finite Element Method for Quantum Dots Array Simulation
Device Performance	Performance Assessment of Spacer Engineered InGaAs NSFETs: A Physical Insight
Diamond MOSFET	Statistical Robustness Analysis of MOSFETs with Different Layout Styles Under Gamma Radiation Using the Coefficient of Variation
Diamond MOSFET (DM)	Statistical Robustness Analysis of Diamond MOSFETs under High-Dose Gamma Radiation in 350 nm Bulk CMOS Technology
diamond-like carbon	SOI based Nanowire Field-Effect Transistor Biosensors with Diamond-Like Carbon Modification
Dielectric	Low-temperature dielectric for BEOL integration of Si-based RFETs
Dielectric BD	Dielectric BD in FDSOI Transistors: circuital compact model and Impact on digital Circuits
Dielectric Mismatch	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
DIG-RFET	Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures
Dirac-source FETs (DSFETs)	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene
Direct bonding	Strain engineering of thin monocrystalline Si films on 8-inch wafers using Surface Activated Hot Bonding
Dopant-free transistors	Orientation-engineered PtTe2 Schottky FETs for dopant-free advanced technology nodes
Doping	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
Drain Voltage	VTH Extraction in VGT-Normalized AlGaN/GaN HEMTs
Drain-extension	Impact of Random Dopant Fluctuation in Stacked Drain Extended NSFETs
E
Edge-Field Engineering	Vertical Capacitance and Edge-Field Engineering in 4H-SiC MOS Capacitors
effective potential	Impact of RDF in the channel on the On-current of GAA nanosheet transistors through Monte Carlo simulations
electric field	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
Electric field modulation	Optimization of Hybrid Source and Drain Extension Metal in AlGaN/GaN HEMTs: A Simulation and Experimental Study
electrical characterization	Probabilistic bits based on Ag/SiOx/BE threshold switching memristors
Electromechanical Simulation	Electrostrictive 2D Heterostructures for Steep Slope FET Applications
Electron density	Optimization of Hybrid Source and Drain Extension Metal in AlGaN/GaN HEMTs: A Simulation and Experimental Study
Electronic structure	Electronic Structure of W-doped In2O3 BEOL Oxide Semiconductors
Electronic transport parameters	Impact of source/drain dopant implantation and spike annealing on electrical parameters of 25 nm FDSOI n-MOSFETs
Electrostatic Integrity	Forksheet versus Nanosheet Transistors: A Multi-Dimensional Scaling Comparison of Electrostatic Performance and Thermal Robustness
Electrostrictive FETs	Electrostrictive 2D Heterostructures for Steep Slope FET Applications
Enhanced flexibility	The Ultimate Field Effect Transistor: GAIA MOSFET
F
FD-SOI	Can resistivity increase with doping? Cryogenic RF Characterisation of Passive Components for VCO and PLL Design in P28 FD-SOI for Quantum Computing Applications Mandrel material selection as prerequisite for SADP implementation at the 10 nm FD-SOI node Reduced metal gate height and in-situ doped faceted raised source and drain regions for advanced RF FD-SOI devices Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures Contact Punch-Through Failure Mitigation in Advanced FD-SOI Nodes Analysis of uncertainties in the Self-Heating Extraction by RF technique in FD-SOI Transistors
FD-SOI MOSFETs	From FD-SOI to MoS2 MOSFETs: Coupling Mechanisms
FD-SOI transistors	Impact of Device Position within the Silicon Active Area on Self-Heating and Thermal Coupling in FD-SOI Transistors
FDSOI	Impact of silicon thickness on the carrier mobility of 28 nm FDSOI MOSFET from room temperature to cryogenic regime BOX CREEP : A Mechanical Booster for Next-Generation FDSOI Understanding room-temperature electrical characterizations of FDSOI spin qubit devices via TCAD simulations ITO/TiW Contacts for Transparent FDSOI CMOS A Scalable Time-Multiplexed Biasing Architecture for FDSOI Spin Qubits Dielectric BD in FDSOI Transistors: circuital compact model and Impact on digital Circuits Impact of BOX scaling and ground plane on 1/f noise in FDSOI pMOSFET
FDSOI MOSFET	Split MLP Architectures for Accurate Joint Modeling of drain and gate currents in FD-SOI Transistors
FDSOI n-MOSFET	Impact of source/drain dopant implantation and spike annealing on electrical parameters of 25 nm FDSOI n-MOSFETs
Ferroelectric	Ultra-low-power in-memory computing based on spin-orbit ferroelectric devices for artificial intelligence and logic Positive-Bias Erase Schemes for FeFETs: Switching Comparison Between FDSOI and Bulk devices
Ferroelectric field-effect transistor (FeFET)	Positive-Bias Erase Schemes for FeFETs: Switching Comparison Between FDSOI and Bulk devices
Ferroelectric semiconductor	Band gap and Defects of AlScN ferroelectrics for BEOL non-volatile memories
ferroelectric switching	Positive-Bias Erase Schemes for FeFETs: Switching Comparison Between FDSOI and Bulk devices
Ferroelectrics	Origin of ferroelectricity in HfO2/ZrO2 thin films without depolarization
Field Effect Transistor	Temperature Dependent Carrier Transport Mechanisms in WSe2
Field-effect depletion regions (FEDRs)	Opposite-Polarity Fixed Charges in BEOL Dielectrics for Interface Passivation on HR Silicon Substrates
Field-effect Transitor	Experimental Demonstration of 2D Core-Shell Junctionless FET
Filament	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
Filament geometry	Investigation of 1T1R Memristive Structures and Physics-Based Extension of the Stanford Model Including the Change of Filament Geometry
filament-free	Ultra-low power Ru/TiOx/TiN RRAM structures for applications in neuromorphic computing
FinFET	Co-Integration of Tunnel FET and FinFET for Hybrid LDO Circuit Design
finFETs	Fabrication and characterisation of GeSn devices for quantum applications
Finite element simulation	Strain engineering of thin monocrystalline Si films on 8-inch wafers using Surface Activated Hot Bonding
first principles calculations	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
First-principles study	Origin of ferroelectricity in HfO2/ZrO2 thin films without depolarization
flat-band voltage	SOI based Nanowire Field-Effect Transistor Biosensors with Diamond-Like Carbon Modification
Forksheet	Forksheet versus Nanosheet Transistors: A Multi-Dimensional Scaling Comparison of Electrostatic Performance and Thermal Robustness
Forksheet FET	Impact of Forksheet Transistor on Low-Dropout Regulator Performance
G
GaN	Analysis of Self Heating in SiC-6H and Al2O3 Substrate Platforms with SiO2 Buried Oxide Integration on AlGaN HEMT
GaN HEMTs	Ultra-low threshold voltage shifts in passivated GaN-on-Si HEMTs under cryogenic operation
Gate	Mandrel material selection as prerequisite for SADP implementation at the 10 nm FD-SOI node
Gate resistance thermometry	Impact of Device Position within the Silicon Active Area on Self-Heating and Thermal Coupling in FD-SOI Transistors
Gate-all-around architecture	Experimental Nanosheet Transistors: Temperature and Inversion-Regime Effects on a Two-Stage Operational Transconductance Amplifier Impact of Vertical Nanowire VFET Structural Asymmetry on Static and Dynamic Performance of Two-Stage OTA
Gate-All-Around FET (GAAFET)	Study of Variability in Threshold Voltage Engineering for Nanosheet MOSFETs using TCAD
Geriatric diagnostics	High-precision Triboelectric Haptic Sensor for IoMT Healthcare
GeSn	Fabrication and characterisation of GeSn devices for quantum applications
gm/ID Methodology	Impact of Forksheet Transistor on Low-Dropout Regulator Performance
graphene	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene Single Trap and Low Frequency 1/f Noise Modeling in MOSFETs with Dirac Materials or 2D Semiconductor Channel
graphene field-effect transistor (GFET)	Bias-dependent contact resistance model in Graphene on-Insulator FETs
graphene-metal junction	Bias-dependent contact resistance model in Graphene on-Insulator FETs
Ground Plane	Impact of BOX scaling and ground plane on 1/f noise in FDSOI pMOSFET
H
hafnium oxide	Positive-Bias Erase Schemes for FeFETs: Switching Comparison Between FDSOI and Bulk devices
Half-Diamond layout style	Enhancing High-Temperature Analog Performance of MOSFETs Through a Half-Diamond Layout Hardness-by-Design Approach
Halide perovskite	A compact model of perovskite memristors inspired by the Stanford RRAM model
Haptic sensor	High-precision Triboelectric Haptic Sensor for IoMT Healthcare
Hardware Security	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
HEMT	Analysis of Self Heating in SiC-6H and Al2O3 Substrate Platforms with SiO2 Buried Oxide Integration on AlGaN HEMT
HEMTs	VTH Extraction in VGT-Normalized AlGaN/GaN HEMTs
Hf1-xZrxO2 Ferroelectric Films	Properties of Ru/Hf1-xZrxO2/p-Si MOS Gate Stack Structures Deposited by Pulsed-DC Sputtering Using a Periodic Layer-by-Layer Deposition Process
HfO2	Physical Electro-thermal Modelling of HfO2-based Nanoscale Memristor for Artificial Synapses Origin of ferroelectricity in HfO2/ZrO2 thin films without depolarization
High Temperature	Forksheet versus Nanosheet Transistors: A Multi-Dimensional Scaling Comparison of Electrostatic Performance and Thermal Robustness
High-resistivity silicon (HR-Si)	Opposite-Polarity Fixed Charges in BEOL Dielectrics for Interface Passivation on HR Silicon Substrates
High-Temperature Analog Performance of MOSFETs	Enhancing High-Temperature Analog Performance of MOSFETs Through a Half-Diamond Layout Hardness-by-Design Approach
Hole mobility	Relocating Dopants from Si to SiO2: About Fundamentals and Applications of Modulation Acceptor Doping of Silicon
hot‑carrier degradation	Interplay of Hot Carrier Degradation and Device Variability in NSFETs: A TCAD Study
hybrid circuit	Co-Integration of Tunnel FET and FinFET for Hybrid LDO Circuit Design
Hydrogen states	Electronic Structure of IGZO and its Hydrogen Defects
I
III-V materials	Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
Implantation- and bonding-free fabrication	Implantation- and Bonding-Free Multilayer SOI Fabrication via Annealing–Oxidation
In-Memory Computing	Study of the annealing effect on Al2O3-based 1T1R RRAM cell
In-situ thermal annealing	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
Incomplete Ionization	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering
InGaAs MOSFETs	Role of Interface Degradation and Overlap Capacitance on the RF Performance of Self-Aligned Gate InGaAs MOSFETs
InGaAs NSFETs	Performance Assessment of Spacer Engineered InGaAs NSFETs: A Physical Insight
InGaZn oxide	Electronic Structure of IGZO and its Hydrogen Defects
Inner gate	The Ultimate Field Effect Transistor: GAIA MOSFET
Input Impedance	Analytical Modeling of Rectifiers for Radio-Frequency Energy Harvesting
interconnect	ITO/TiW Contacts for Transparent FDSOI CMOS
interface dipole engineering	Study of Variability in Threshold Voltage Engineering for Nanosheet MOSFETs using TCAD
interface engineering	Interface-Engineered Cryogenic Memristors Enabling Sub-100 μV Scalable Qubit Biasing
Interface passivation	Opposite-Polarity Fixed Charges in BEOL Dielectrics for Interface Passivation on HR Silicon Substrates
Interface State Density	Properties of Ru/Hf1-xZrxO2/p-Si MOS Gate Stack Structures Deposited by Pulsed-DC Sputtering Using a Periodic Layer-by-Layer Deposition Process
Interface States	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering
Internal thermal oxidation	Implantation- and Bonding-Free Multilayer SOI Fabrication via Annealing–Oxidation
Inversion regime	Experimental Nanosheet Transistors: Temperature and Inversion-Regime Effects on a Two-Stage Operational Transconductance Amplifier
inverters	Dielectric BD in FDSOI Transistors: circuital compact model and Impact on digital Circuits
Ionization	On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
ISCAS Benchmark Circuits	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
ITF	Interplay of Hot Carrier Degradation and Device Variability in NSFETs: A TCAD Study
ITO	ITO/TiW Contacts for Transparent FDSOI CMOS
J
junction optimisation	Reduced metal gate height and in-situ doped faceted raised source and drain regions for advanced RF FD-SOI devices
Junctionless	Demonstration of the Novel Junctionless Complementary FET
Junctionless FET	Experimental Demonstration of 2D Core-Shell Junctionless FET
Junctionless Nanowire transistor	Temperature Influence on Single Trap Junctionless Nanowire Transistors Low-Frequency Noise Operation of Junctionless Nanowire Transistors-Based Common Source Current Mirror at Cryogenic Temperatures
K
Key	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
Kolmogorv Arnold Networks	Exploiting SOI nonlinear heterogeneity to implement KAN physical networks using Synaptic Nonlinear Elements
L
LDO Circuit	Co-Integration of Tunnel FET and FinFET for Hybrid LDO Circuit Design
Leakage Current	Properties of Ru/Hf1-xZrxO2/p-Si MOS Gate Stack Structures Deposited by Pulsed-DC Sputtering Using a Periodic Layer-by-Layer Deposition Process
LF noise	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
LIF neuron	Brain-Inspired Computing Enabled by a Universal NbOx Memristor with Multi-Mode Switching
lifetime	Dielectric BD in FDSOI Transistors: circuital compact model and Impact on digital Circuits
liquid probe	Feasibility Study of a Damage- and Pressure-Free AC Pseudo-MOS Method Using a Mercury Probe
Liquid–solid interface	SOI based Nanowire Field-Effect Transistor Biosensors with Diamond-Like Carbon Modification
Logic Locking	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
Lorentzian model	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
low frequency 1/f noise	Single Trap and Low Frequency 1/f Noise Modeling in MOSFETs with Dirac Materials or 2D Semiconductor Channel
Low Frequency Noise	Temperature Influence on Single Trap Junctionless Nanowire Transistors Low-Frequency Noise
Low-Dropout Regulator	Impact of Forksheet Transistor on Low-Dropout Regulator Performance
Low-frequency noise	Cryogenic DC and Low-Frequency Noise Investigation of Vertical Gate-All-Around Silicon Nanowire pMOSFET Arrays
Low-power Electronics	Experimental Demonstration of 2D Core-Shell Junctionless FET
M
Machine learning	Split MLP Architectures for Accurate Joint Modeling of drain and gate currents in FD-SOI Transistors
Magnetron sputtering	Optimization of Magnetron-Sputtered Al Thin Films for Controlled Surface Roughness in RRAM Applications
Mandrel	Mandrel material selection as prerequisite for SADP implementation at the 10 nm FD-SOI node
materials science	Electronic Structure of IGZO and its Hydrogen Defects Electronic Structure of W-doped In2O3 BEOL Oxide Semiconductors
Membrane–cavity architecture	Implantation- and Bonding-Free Multilayer SOI Fabrication via Annealing–Oxidation
memories	Positive-Bias Erase Schemes for FeFETs: Switching Comparison Between FDSOI and Bulk devices
memory	Band gap and Defects of AlScN ferroelectrics for BEOL non-volatile memories Electronic Structure of IGZO and its Hydrogen Defects
Memristive devices	Investigation of 1T1R Memristive Structures and Physics-Based Extension of the Stanford Model Including the Change of Filament Geometry
Memristive Soft Threshold Neuron	Al/SnO2/ITO-Based Memristive Soft-Threshold Neuron (MSTN) for Low-Power Neuromorphic Computing
memristive switching	Brain-Inspired Computing Enabled by a Universal NbOx Memristor with Multi-Mode Switching
Memristor	Improving the conductance ratio of mechanically-exfoliated MoS2 and WS2 based memristors Area-Dependent Switching and Synaptic Behavior in Al/TiOx/TiN devices
Metal extension	Optimization of Hybrid Source and Drain Extension Metal in AlGaN/GaN HEMTs: A Simulation and Experimental Study
metal-to-semiconductor transition	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
Metallic layers	DC characterization of BEOL metallic layers in silicon technologies for cryogenic microelectronics
Middle-of-line	Contact Punch-Through Failure Mitigation in Advanced FD-SOI Nodes
Mixed finite element method	Mixed Finite Element Method for Quantum Dots Array Simulation
Modeling	Investigation of 1T1R Memristive Structures and Physics-Based Extension of the Stanford Model Including the Change of Filament Geometry
molybdenum disulfide (MoS2)	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene
Monolithic vs. Sequential Integration	Strategic Stress Engineering in CFETs: Monolithic vs. Sequential
Monte Carlo simulations	Impact of RDF in the channel on the On-current of GAA nanosheet transistors through Monte Carlo simulations
MoS2	DFT based layered dielectric model for MoS2/SiO2 structure
MOSCAPs	Fabrication and characterisation of GeSn devices for quantum applications
MOSFET	Impact of silicon thickness on the carrier mobility of 28 nm FDSOI MOSFET from room temperature to cryogenic regime Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures Analysis of uncertainties in the Self-Heating Extraction by RF technique in FD-SOI Transistors Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures
Multi Layer Perceptron	Simulating the Impact of Activation Functions on the Performance of 1T1R RRAM-Based Neural Networks Under Cycle-to-Cycle Variability Conditions
Multi-valued logic	Enhancing Negative Differential Transconductance by Ultra-Thin Ge on SOI
Multilayer SOI	Implantation- and Bonding-Free Multilayer SOI Fabrication via Annealing–Oxidation
N
n/p doping	Absence of P-doping by Localized Acceptor Polarons in TeO2 Semiconductors
nano-fabrication	Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
Nanomaterial engineering	High-precision Triboelectric Haptic Sensor for IoMT Healthcare
Nanoscle memristor	Physical Electro-thermal Modelling of HfO2-based Nanoscale Memristor for Artificial Synapses
Nanosheet	Forksheet versus Nanosheet Transistors: A Multi-Dimensional Scaling Comparison of Electrostatic Performance and Thermal Robustness
Nanosheet FET	Non-Quasi Static Small Signal Model of a Nanosheet FET for High-Frequency Application: Capturing the Role of the Corner Rounding
Nanosheet transistor	Impact of RDF in the channel on the On-current of GAA nanosheet transistors through Monte Carlo simulations Experimental Nanosheet Transistors: Temperature and Inversion-Regime Effects on a Two-Stage Operational Transconductance Amplifier
Negative differential transconductance	Enhancing Negative Differential Transconductance by Ultra-Thin Ge on SOI
NEGF	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene
Neural Network	Split MLP Architectures for Accurate Joint Modeling of drain and gate currents in FD-SOI Transistors
Neuromorphic computing	Ultra-low power Ru/TiOx/TiN RRAM structures for applications in neuromorphic computing Al/SnO2/ITO-Based Memristive Soft-Threshold Neuron (MSTN) for Low-Power Neuromorphic Computing Physical Electro-thermal Modelling of HfO2-based Nanoscale Memristor for Artificial Synapses Area-Dependent Switching and Synaptic Behavior in Al/TiOx/TiN devices
Neuron	Al/SnO2/ITO-Based Memristive Soft-Threshold Neuron (MSTN) for Low-Power Neuromorphic Computing
New Channel Materials	Experimental Demonstration of 2D Core-Shell Junctionless FET
New FET architecture	The Ultimate Field Effect Transistor: GAIA MOSFET
New Gate Layout Style for MOSFETs	Enhancing High-Temperature Analog Performance of MOSFETs Through a Half-Diamond Layout Hardness-by-Design Approach
Nitrogen	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
Noise	Impact of BOX scaling and ground plane on 1/f noise in FDSOI pMOSFET
Noise measurement	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
Non Quasi Static	Non-Quasi Static Small Signal Model of a Nanosheet FET for High-Frequency Application: Capturing the Role of the Corner Rounding
Non-Volatile	Ultra-low-power in-memory computing based on spin-orbit ferroelectric devices for artificial intelligence and logic
Novel devices	Exploiting SOI nonlinear heterogeneity to implement KAN physical networks using Synaptic Nonlinear Elements
NSFETs	Interplay of Hot Carrier Degradation and Device Variability in NSFETs: A TCAD Study
O
On-wafer measurements	Cryogenic RF Characterisation of Passive Components for VCO and PLL Design in P28 FD-SOI for Quantum Computing Applications
open-gap graphene	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene
Operational Transconductance Amplifier	Experimental Nanosheet Transistors: Temperature and Inversion-Regime Effects on a Two-Stage Operational Transconductance Amplifier Impact of Vertical Nanowire VFET Structural Asymmetry on Static and Dynamic Performance of Two-Stage OTA
Optimization	Optimization of Magnetron-Sputtered Al Thin Films for Controlled Surface Roughness in RRAM Applications
Oxide semiconductors	Electronic Structure of W-doped In2O3 BEOL Oxide Semiconductors
oxides	Absence of P-doping by Localized Acceptor Polarons in TeO2 Semiconductors
P
p-bit	Probabilistic bits based on Ag/SiOx/BE threshold switching memristors
Paired-pulse facilitation	Area-Dependent Switching and Synaptic Behavior in Al/TiOx/TiN devices
parameter extraction	Impact of neglecting the bias dependence of access resistances on DC and 1/f noise parameter extraction
Parasitic Capacitance	Role of Interface Degradation and Overlap Capacitance on the RF Performance of Self-Aligned Gate InGaAs MOSFETs
Parasitic surface conduction	Opposite-Polarity Fixed Charges in BEOL Dielectrics for Interface Passivation on HR Silicon Substrates
Patterning	Mandrel material selection as prerequisite for SADP implementation at the 10 nm FD-SOI node
Performance evaluation	Low-temperature dielectric for BEOL integration of Si-based RFETs
Perovskite memristor	A compact model of perovskite memristors inspired by the Stanford RRAM model
Phosphorus	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
Physical modelling	Physical Electro-thermal Modelling of HfO2-based Nanoscale Memristor for Artificial Synapses
Physics-based	Investigation of 1T1R Memristive Structures and Physics-Based Extension of the Stanford Model Including the Change of Filament Geometry Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures
Physics-Based Simulation	Real Time Simulations of Advanced MOSFETs
Piezoelectric 2D Materials	Electrostrictive 2D Heterostructures for Steep Slope FET Applications
Polymorphic Logic Gates	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
Potentiation and Depression	Area-Dependent Switching and Synaptic Behavior in Al/TiOx/TiN devices
pseudo-MOS	Feasibility Study of a Damage- and Pressure-Free AC Pseudo-MOS Method Using a Mercury Probe
Pulsed-DC Magnetron Sputtering	Properties of Ru/Hf1-xZrxO2/p-Si MOS Gate Stack Structures Deposited by Pulsed-DC Sputtering Using a Periodic Layer-by-Layer Deposition Process
Punch-through	Contact Punch-Through Failure Mitigation in Advanced FD-SOI Nodes
Q
Quantum Confinement	Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering
Quantum confinent	Impact of silicon thickness on the carrier mobility of 28 nm FDSOI MOSFET from room temperature to cryogenic regime
Quantum dots	Mixed Finite Element Method for Quantum Dots Array Simulation
Quantum transport	Orientation-engineered PtTe2 Schottky FETs for dopant-free advanced technology nodes
qubits	Fabrication and characterisation of GeSn devices for quantum applications A Scalable Time-Multiplexed Biasing Architecture for FDSOI Spin Qubits
R
Radiation-Hardness-By-Design (RHBD)	Statistical Robustness Analysis of MOSFETs with Different Layout Styles Under Gamma Radiation Using the Coefficient of Variation
Radio Frequency Energy Harvestin	Analytical Modeling of Rectifiers for Radio-Frequency Energy Harvesting
Raman spectroscopy	BOX CREEP : A Mechanical Booster for Next-Generation FDSOI
Random dopant fluctuation	Impact of Random Dopant Fluctuation in Stacked Drain Extended NSFETs
Random dopant fluctuations	Impact of RDF in the channel on the On-current of GAA nanosheet transistors through Monte Carlo simulations
Random Telegraph Noise	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
Real Time Calibration	Real Time Simulations of Advanced MOSFETs
Reconfigurable Field-Effect Transistor (RFET)	Analysis and Optimization of a Planar SOI RFET for Dynamic Reconfigurable Logic
Reconfigurable Logic	Analysis and Optimization of a Planar SOI RFET for Dynamic Reconfigurable Logic
Reconfigurable Transistors	Experimental Emulation and Functional Validation of a Dual-Doped Reconfigurable FET for Hardware Security
Reduced SCE	The Ultimate Field Effect Transistor: GAIA MOSFET
ReRAM	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
reservoir computing	Brain-Inspired Computing Enabled by a Universal NbOx Memristor with Multi-Mode Switching
Resistive Random Access Memory	Simulating the Impact of Activation Functions on the Performance of 1T1R RRAM-Based Neural Networks Under Cycle-to-Cycle Variability Conditions
Resistivity	Can resistivity increase with doping?
RF characterisation	Cryogenic RF Characterisation of Passive Components for VCO and PLL Design in P28 FD-SOI for Quantum Computing Applications
RF devices	Reduced metal gate height and in-situ doped faceted raised source and drain regions for advanced RF FD-SOI devices
RF extraction	Analysis of uncertainties in the Self-Heating Extraction by RF technique in FD-SOI Transistors
RF performance	Role of Interface Degradation and Overlap Capacitance on the RF Performance of Self-Aligned Gate InGaAs MOSFETs Opposite-Polarity Fixed Charges in BEOL Dielectrics for Interface Passivation on HR Silicon Substrates
RF-SOI	Can resistivity increase with doping?
RFET	Low-temperature dielectric for BEOL integration of Si-based RFETs
ring oscillators	Dielectric BD in FDSOI Transistors: circuital compact model and Impact on digital Circuits
Roughness	Optimization of Magnetron-Sputtered Al Thin Films for Controlled Surface Roughness in RRAM Applications
RRAM	Ultra-low power Ru/TiOx/TiN RRAM structures for applications in neuromorphic computing Probabilistic bits based on Ag/SiOx/BE threshold switching memristors Al/SnO2/ITO-Based Memristive Soft-Threshold Neuron (MSTN) for Low-Power Neuromorphic Computing Optimization of Magnetron-Sputtered Al Thin Films for Controlled Surface Roughness in RRAM Applications Study of the annealing effect on Al2O3-based 1T1R RRAM cell
RRR	DC characterization of BEOL metallic layers in silicon technologies for cryogenic microelectronics
Ru Gate Electrode	Properties of Ru/Hf1-xZrxO2/p-Si MOS Gate Stack Structures Deposited by Pulsed-DC Sputtering Using a Periodic Layer-by-Layer Deposition Process
S
SADP	Mandrel material selection as prerequisite for SADP implementation at the 10 nm FD-SOI node
scaling	Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
Schottky barrier field-effect transistor	Enhancing Negative Differential Transconductance by Ultra-Thin Ge on SOI
Schottky Contact	Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures
Schottky FET	Orientation-engineered PtTe2 Schottky FETs for dopant-free advanced technology nodes
Self-Heating	Impact of Device Position within the Silicon Active Area on Self-Heating and Thermal Coupling in FD-SOI Transistors Analysis of uncertainties in the Self-Heating Extraction by RF technique in FD-SOI Transistors
Semiconductor	Optimization of Magnetron-Sputtered Al Thin Films for Controlled Surface Roughness in RRAM Applications
Short-channel effects	From FD-SOI to MoS2 MOSFETs: Coupling Mechanisms
short-term memory	Brain-Inspired Computing Enabled by a Universal NbOx Memristor with Multi-Mode Switching
SiGe Stressor Optimization	Strategic Stress Engineering in CFETs: Monolithic vs. Sequential
Silicon	On the activation of dopants in ultrathin Si films: interface effects and dielectric mismatch at work
Silicon modulation doping	Relocating Dopants from Si to SiO2: About Fundamentals and Applications of Modulation Acceptor Doping of Silicon
Silicon nanowires	Relocating Dopants from Si to SiO2: About Fundamentals and Applications of Modulation Acceptor Doping of Silicon
Silicon nitride	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
Silicon On Insulator	Feasibility Study of a Damage- and Pressure-Free AC Pseudo-MOS Method Using a Mercury Probe
Silicon thickness	Impact of silicon thickness on the carrier mobility of 28 nm FDSOI MOSFET from room temperature to cryogenic regime
Silicon-on-Insulator	Experimental Demonstration of 2D Core-Shell Junctionless FET Tuning the metal-insulator transition in ultrathin silicon-on-insulator films through interface engineering
Simulation	Simulating the Impact of Activation Functions on the Performance of 1T1R RRAM-Based Neural Networks Under Cycle-to-Cycle Variability Conditions
single trap	Single Trap and Low Frequency 1/f Noise Modeling in MOSFETs with Dirac Materials or 2D Semiconductor Channel
SiO2	DFT based layered dielectric model for MoS2/SiO2 structure
Small Signal Modeling	Non-Quasi Static Small Signal Model of a Nanosheet FET for High-Frequency Application: Capturing the Role of the Corner Rounding
Smart Cut technology	Strain engineering of thin monocrystalline Si films on 8-inch wafers using Surface Activated Hot Bonding
Soft threshold	Al/SnO2/ITO-Based Memristive Soft-Threshold Neuron (MSTN) for Low-Power Neuromorphic Computing
Spacer Engineering	Performance Assessment of Spacer Engineered InGaAs NSFETs: A Physical Insight
Spike annealing	Impact of source/drain dopant implantation and spike annealing on electrical parameters of 25 nm FDSOI n-MOSFETs
spin qubits	Interface-Engineered Cryogenic Memristors Enabling Sub-100 μV Scalable Qubit Biasing Understanding room-temperature electrical characterizations of FDSOI spin qubit devices via TCAD simulations
Spintronic Logic	Ultra-low-power in-memory computing based on spin-orbit ferroelectric devices for artificial intelligence and logic
SRAM	Study of Variability in Threshold Voltage Engineering for Nanosheet MOSFETs using TCAD
stability	SOI based Nanowire Field-Effect Transistor Biosensors with Diamond-Like Carbon Modification
Stack Nanosheet FET	Real Time Simulations of Advanced MOSFETs
Stacked MoS₂ channel FETs	In-depth TCAD study of stacked MoS₂ channel FETs based on a channel-last integration
Stanford model	Investigation of 1T1R Memristive Structures and Physics-Based Extension of the Stanford Model Including the Change of Filament Geometry
Stanford RRAM	A compact model of perovskite memristors inspired by the Stanford RRAM model
Statistical Robustness	Statistical Robustness Analysis of Diamond MOSFETs under High-Dose Gamma Radiation in 350 nm Bulk CMOS Technology
Strain	BOX CREEP : A Mechanical Booster for Next-Generation FDSOI
Strain-to-Stress Transduction	Electrostrictive 2D Heterostructures for Steep Slope FET Applications
Strained Si	Strain engineering of thin monocrystalline Si films on 8-inch wafers using Surface Activated Hot Bonding
Stress Engineering	Strategic Stress Engineering in CFETs: Monolithic vs. Sequential
Substrate	Can resistivity increase with doping?
Switching-cycle	Investigation of 1T1R Memristive Structures and Physics-Based Extension of the Stanford Model Including the Change of Filament Geometry
Synaptic devices	Physical Electro-thermal Modelling of HfO2-based Nanoscale Memristor for Artificial Synapses
T
TCAD	Forksheet versus Nanosheet Transistors: A Multi-Dimensional Scaling Comparison of Electrostatic Performance and Thermal Robustness DFT based layered dielectric model for MoS2/SiO2 structure Single Trap and Low Frequency 1/f Noise Modeling in MOSFETs with Dirac Materials or 2D Semiconductor Channel Study of Variability in Threshold Voltage Engineering for Nanosheet MOSFETs using TCAD Impact of BOX scaling and ground plane on 1/f noise in FDSOI pMOSFET
TCAD simulation	Experimental Demonstration of 2D Core-Shell Junctionless FET Real Time Simulations of Advanced MOSFETs In-depth TCAD study of stacked MoS₂ channel FETs based on a channel-last integration Optimization of Hybrid Source and Drain Extension Metal in AlGaN/GaN HEMTs: A Simulation and Experimental Study
TCAD simulations	Understanding room-temperature electrical characterizations of FDSOI spin qubit devices via TCAD simulations Vertical Capacitance and Edge-Field Engineering in 4H-SiC MOS Capacitors
Temperature	Experimental Nanosheet Transistors: Temperature and Inversion-Regime Effects on a Two-Stage Operational Transconductance Amplifier
Temperature variation	Temperature Influence on Single Trap Junctionless Nanowire Transistors Low-Frequency Noise
TFET	Co-Integration of Tunnel FET and FinFET for Hybrid LDO Circuit Design
Thermal Coupling	Impact of Device Position within the Silicon Active Area on Self-Heating and Thermal Coupling in FD-SOI Transistors
thin films	Origin of ferroelectricity in HfO2/ZrO2 thin films without depolarization
threshold switching	Probabilistic bits based on Ag/SiOx/BE threshold switching memristors
Threshold Voltage	Ultra-low threshold voltage shifts in passivated GaN-on-Si HEMTs under cryogenic operation VTH Extraction in VGT-Normalized AlGaN/GaN HEMTs Demonstration of the Novel Junctionless Complementary FET
Threshold Voltage Engineering	Experimental Demonstration of 2D Core-Shell Junctionless FET
TIG-RFET	Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures
TiOx	Area-Dependent Switching and Synaptic Behavior in Al/TiOx/TiN devices
TMDs	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
Total Ionizing Dose (TID)	Statistical Robustness Analysis of Diamond MOSFETs under High-Dose Gamma Radiation in 350 nm Bulk CMOS Technology
Transconductance	VTH Extraction in VGT-Normalized AlGaN/GaN HEMTs Optimization of Hybrid Source and Drain Extension Metal in AlGaN/GaN HEMTs: A Simulation and Experimental Study
transistor	ITO/TiW Contacts for Transparent FDSOI CMOS
Transition Metal Dichalcogenides	Temperature Dependent Carrier Transport Mechanisms in WSe2
transparent electronics	ITO/TiW Contacts for Transparent FDSOI CMOS
Trap recovery	Demonstration of Trap Recovery by In-Situ Annealing in 28nm FD-SOI MOSFETs at Cryogenic Temperatures
Traps	Temperature Influence on Single Trap Junctionless Nanowire Transistors Low-Frequency Noise
Triboelectricity	High-precision Triboelectric Haptic Sensor for IoMT Healthcare
Two-dimensional Electronic Devices	Experimental Demonstration of 2D Core-Shell Junctionless FET
Two-dimensional Materials	Experimental Demonstration of 2D Core-Shell Junctionless FET
U
Ultra Low Power	Ultra-low-power in-memory computing based on spin-orbit ferroelectric devices for artificial intelligence and logic
ultra-low power system	Ultra-low power Ru/TiOx/TiN RRAM structures for applications in neuromorphic computing
Ultra-thin Ge on SOI	Enhancing Negative Differential Transconductance by Ultra-Thin Ge on SOI
Unconventional Computing	Exploiting SOI nonlinear heterogeneity to implement KAN physical networks using Synaptic Nonlinear Elements
V
Vacancies	Al-rich AlN thin films deposited by Molecular Beam Epitaxy on SiNx ReRAMs
van der Waals (vdW) heterostructures	Ab-initio transport simulations of Dirac Source FETs based on van der Waals Heterojunctions between graphene and functionalized graphene
van der Waals interaction	Electric Field Control of Metal-to-Semiconductor Transition in BL-PtTe2
variability	Impact of Random Dopant Fluctuation in Stacked Drain Extended NSFETs Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
Variability analysis	Interplay of Hot Carrier Degradation and Device Variability in NSFETs: A TCAD Study
Verilog-A	Unified Physics-Based Verilog-A Compact Model of Independent-Gate Reconfigurable FETs: Dual- and Triple-Gate Architectures
Verilog-A Modeling	Impact of Forksheet Transistor on Low-Dropout Regulator Performance
Vertical GAA	Cryogenic DC and Low-Frequency Noise Investigation of Vertical Gate-All-Around Silicon Nanowire pMOSFET Arrays
Vertical Mechanical Coupling	Strategic Stress Engineering in CFETs: Monolithic vs. Sequential
Vertical Nanowire	Impact of Vertical Nanowire VFET Structural Asymmetry on Static and Dynamic Performance of Two-Stage OTA Stack-in-Pillar, a CFET strategy to implement IC at advanced technology nodes
W
WFV	Interplay of Hot Carrier Degradation and Device Variability in NSFETs: A TCAD Study
wiring scalability	Interface-Engineered Cryogenic Memristors Enabling Sub-100 μV Scalable Qubit Biasing
workfunction variation	Study of Variability in Threshold Voltage Engineering for Nanosheet MOSFETs using TCAD
WSe2	Temperature Dependent Carrier Transport Mechanisms in WSe2
Y
Y-function method	Cryogenic DC and Low-Frequency Noise Investigation of Vertical Gate-All-Around Silicon Nanowire pMOSFET Arrays