PRIME 2014: 10TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS

PROGRAM

Days: Monday, June 30th Tuesday, July 1st Wednesday, July 2nd Thursday, July 3rd

Monday, June 30th

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10:40-12:20 Session 1: Workshop on Green Electronics
Location: Petit Salon
10:40
IP rights, and particularly patents - How and what for ? PART I (abstract)
11:10
IP rights, and particularly patents - How and what for ? PART II (abstract)
11:40
Mixed-signal verification challenges (abstract)
12:20-13:20Lunch Break
13:20-15:00 Session 2: Workshop on Green Electronics
Location: Petit Salon
13:20
Electronics for Energy Management (abstract)
14:10
Reduction of IPs Energy Consumption with Ultra-Low Voltage Supply (abstract)
15:00-15:20Coffee Break
15:20-17:00 Session 3: Workshop on Green Electronics
15:20
Power Management of Ultra Low Power Radio and Microcontroller Communication (abstract)
16:10
RF Power Gating Techniques for Ultra Low Power Communication Systems (abstract)
Tuesday, July 1st

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09:00-09:30 Session 4: Opening and Plenary
Location: Petit Salon
09:30-10:10 Session 5A: Simulation Approaches of Analog and Digital Systems
Location: Room B221
09:30
Accurate Modeling of Ultra Low-Power Sigma-Delta Modulator (abstract)
09:50
System-on-Chip Verification: TLM-to-RTL Assertions Transformation (abstract)
09:30-10:10 Session 5B: ADC/DAC/Mixed I
Location: Petit Salon
09:30
A 1.2V low-power high-resolution noise-shaping ADC using multistage time encoding converters for Biomedical Applications (abstract)
09:50
A Low Power Second Order Current Mode Continuous Time Sigma Delta ADC with 98 dB SNDR (abstract)
09:30-10:10 Session 5C: Signal Processing
Location: Room B225
09:30
Continuous Time Analog to Digital Conversion in Interferer Resistant Wake Up Radios (abstract)
09:50
Green improvements of IEEE 802.11 directional multi-gigabit physical layer specifications (abstract)
10:10-10:40Coffee Break
10:40-12:20 Session 6A: Simulation Approaches of Analog and Digital Systems
Location: Room B221
10:40
An Efficient Simulation Methodology for Electrical Energy Systems (abstract)
11:00
Macromodel-based Signal and Power Integrity simulations of an LP-DDR2 interface in mSiP (abstract)
11:20
A SystemC Bluetooth Network Simulator (abstract)
11:40
A new algorithm for convergence verification in circuit level simulations (abstract)
12:00
Simulation methodology for Large-Bandwidth Track-and-Hold microwave circuit (abstract)
10:40-12:20 Session 6B: ADC/DAC/Mixed I
Location: Petit Salon
10:40
Design of Class-D Amplifier for Audio Portable Solutions (abstract)
11:20
Time Interleaved Current Steering DAC for Ultra-High Conversion Rate (abstract)
11:40
Calibrated Switched Capacitor Integrators based on Current Conveyors and its application to Delta Sigma ADC (abstract)
12:00
Statistical Analysis of Harmonic Distortion in a Differential Bootstrapped Sample and Hold Circuit (abstract)
10:40-12:20 Session 6C: Signal Processing
Location: Room B225
10:40
Multiple-Event Direct to Histogram TDC in 65nm FPGA Technology (abstract)
11:00
High-Speed Serial Interface with a Full Digital Delay-Loop (abstract)
11:20
Low-Cost EVM Built-in Test of RF Transceivers (abstract)
11:40
A vector implementation of a fast Fourier transform on DSP and NVIDIA CUDA platforms (abstract)
12:00
Experimental validation of a new power line communication system for battery management (abstract)
12:20-13:20Lunch Break
13:20-15:00 Session 7A: NEMS, MEMS, Sensors
Location: Room B221
13:20
Carbon Nanotube Based Temperature Sensors Fabricated by Large-Scale Spray Deposition (abstract)
13:40
Methodology Modeling of MaE-fabricated Porous Silicon Nanowires (abstract)
14:00
Analysis and Modeling of Four-Folded Vertical Hall Devices in Current Domain (abstract)
14:20
3-Terminal Tungsten CMOS-NEM Relay (abstract)
14:40
Tunable Transimpedance Sustaining-Amplifier for High Impedance CMOS-MEMS Resonators (abstract)
13:20-15:00 Session 7B: Reliability Analysis of Analog and Digital Systems
Location: Petit Salon
13:20
AUTOMICS: A novel CAD framework for substrate modeling (abstract)
14:00
Sensitivity based Methodologies for Process Variation Aware Analog IC Optmization (abstract)
14:20
Impact of enhanced contact doping on minority carriers diffusion currents (abstract)
14:40
Reliability Analysis of Logic Circuits Using Probablistic Techniques (abstract)
13:20-15:00 Session 7C: Energy Harvesting
Location: Room B225
13:20
A 40mV Start up Voltage DC–DC Converter for Thermoelectric Energy Harvesting Applications (abstract)
13:40
Wire-bonds Used as Matching Inductor in RF Energy Harvesting Applications (abstract)
14:00
FEM modeling of vertically integrated nanogenerators in compression and flexion modes (abstract)
14:20
Design of a low power wireless sensor network node for distributed active vibration control system (abstract)
14:40
Co-design of Dual-band GSM Filtenna based on Printed-IFA for Energy Harvesting (abstract)
15:00-15:20Coffee Break
15:20-17:00 Session 8A: Power Amplifier and Detector
Location: Room B221
15:20
Sub-Threshold Based Power Detector for Low-Cost Millimeter-Wave Applications (abstract)
15:40
Structured Design to Optimize the Output Power of Stacked Power Amplifiers (abstract)
16:00
66-87 GHz Power Amplifier with 20dBm 1-dB compression point and 35% peak PAE in a 55nm SiGe technology (abstract)
16:20
A Linear Model of Efficiency for Switched-Capacitor RF Power-Amplifiers (abstract)
16:40
Analysis and Design of a High Power, High Gain SiGe BiCMOS Output Stage for Use in a Millimeter-Wave Power Amplifier (abstract)
15:20-17:00 Session 8B: CMOS Sensor Design
Location: Petit Salon
15:20
Sensor interfaces: keys to success of integrated sensor systems (abstract)
16:00
Base-Station Design for Passive UHF RFID Tags with Pulse-Width Modulated Backscattering (abstract)
16:20
Backside Illuminated Wafer-to-Wafer Bonding Single Photon Avalanche Diode Array (abstract)
16:40
5x5 SPAD Matrices for the Study of the Trade-offs between Fill Factor, Dark Count Rate and Crosstalk in the Design of CMOS Image Sensors (abstract)
15:20-17:00 Session 8C: Material and Process Challenges
Location: Room B225
15:20
Structural, magnetic and dielectric properties of nanocomposites for RF applications (abstract)
15:40
Fabrication and characterization of ECM memories based on a solid electrolyte Ge2Sb2Te5 (abstract)
16:00
Role of Nanowire Length in Morphological and Electrical Properties of Silicon Nanonets (abstract)
16:20
Wavy channel thin film transistor for area efficient high performance and low power applications (abstract)
16:40
Investigation of the optics system carbonaceous contamination induced by chemically amplified resist outgassing under e-beam radiation (abstract)
18:00-20:00Welcome Reception
Wednesday, July 2nd

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08:50-10:10 Session 9A: Power Electronics: Integration, Modeling and Applications
Location: Room B221
08:50
A Suitable Inductor Modeling for DC-DC Converters (abstract)
09:10
Monolithically Integrated Voltage Level Shifter for Wide Bandgap Devices-Based Converters (abstract)
09:30
Extensive Electro-Thermal Simulation Methodology for Automotive High Power Circuits (abstract)
09:50
Two-Dimensional Optical Beam Induced Current measurements in 4H-SiC bipolar diodes (abstract)
08:50-10:10 Session 9B: Emerging Technologies for Digital Circuits
Location: Petit Salon
08:50
Towards the Use of Functionality-Enhanced Devices : A Transversal Design Approach (abstract)
09:30
Safe Operation Region Characterization for Quantifying the Reliability of CMOS Logic Affected by Process Variations (abstract)
09:50
High Performance Electronics on Flexible Silicon for Brain Computing (abstract)
10:10-10:40Coffee Break
10:40-12:20 Session 10A: Digital Techniques I
Location: Room B221
10:40
Towards Formal Verification of Reset Sequence in Fully Asynchronous Digital Circuits (abstract)
11:00
A New Circuit Topology for Floating High Voltage Level Shifters (abstract)
11:20
Probabilistic Saboteur-based Simulated Fault Injection Techniques for Low Supply Voltage Interconnects (abstract)
11:40
Design of a secure architecture for scalar multiplication on elliptic curves (abstract)
12:00
ASIC design of a Phoneme Recogniser based on Discrete Wavelet Transforms and Support Vector Machines (abstract)
10:40-12:20 Session 10B: Millimeter Wave Circuits
Location: Petit Salon
10:40
ESD Co-Design methodologies for RF and mmW circuits (abstract)
11:20
Filterless millimetre-wave optical generation using optical phase modulators without DC bias (abstract)
11:40
A Digitally Controlled Threshold Adjustment Circuit in a 0.13um SiGe BiCMOS Technology for Receiving Multilevel Signals up to 80Gbps (abstract)
12:00
A 60 GHz down-conversion mixer using a novel topology in 65 nm CMOS (abstract)
12:20-13:20Lunch Break
13:20-15:00 Session 11A: Signal Generation Circuits
Location: Petit Salon
13:20
A High Conversion Gain Millimeter-Wave Frequency Doubler in 65nm CMOS (abstract)
13:40
Integrated Multi-band Fractional-N PLL for FMCW Radar Systems at 2.4 and 5.8 GHz (abstract)
14:00
A Low Power, Small Area, Fully Integrated 5.5GHz CMOS LC-VCO (abstract)
14:20
Comparative Analyses of Phase Noise in Differential Oscillator Topologies in 28 nm CMOS Technology (abstract)
14:40
A compact model for pulsed oscillations in switched cross-coupled MOS oscillators based on a novel approximated solution for the Van der Pol oscillator. (abstract)
13:20-15:00 Session 11B: Company Fair
Location: Grand Salon
15:00-15:20Coffee Break
15:20-17:00 Session 12A: Amplifiers
Location: Petit Salon
15:20
High Precision Bidirectional Chopper Instrumentation Amplifier With Negative and Positive Input Common Mode Range (abstract)
15:40
Comparative Study of a Fully Differential Op Amp in FinFET and Planar Technologies (abstract)
16:00
An novel architecture for current-feedback instrumentation amplifiers with rail-to-rail input range (abstract)
16:20
A Bootstrap Transimpedance Amplifier for High Speed Optical Transcutaneous Wireless Links (abstract)
16:40
High Accuracy Current Sense Amplifier With Extended Input Common Mode Range (abstract)
15:20-17:00 Session 12B: Company Fair
Location: Grand Salon
18:00-23:00Gala Dinner
Thursday, July 3rd

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08:50-10:10 Session 13A: Digital Techniques II
Location: Room B221
08:50
Test and Diagnosis of FPGA Cluster Using Partial Reconfiguration (abstract)
09:10
A New Hardware Implementation of The Advanced Encryption Standard Algorithm for Automotive Application (abstract)
09:30
FPGA Design for the Decoding Functions of the Physical Layer Adaptation Subsystem of XG-PON Optical Network Unit/Terminal (abstract)
09:50
Fast Register Criticality Evaluation in a SPARC Microprocessor (abstract)
08:50-10:10 Session 13B: Power Converter and Integrated Control
Location: Petit Salon
08:50
Challenges and benefits of microelectronics for power electronics: from integrated optical driving to optimized power semiconductor switches (abstract)
09:30
An Improved DC-Link Voltage Equalization for Three-Level Neutral-Point Clamped Converters (abstract)
09:50
Simplified Review of DCDC Switching Noise and Spectrum Contents (abstract)
08:50-10:10 Session 13C: Modeling and Characterization for Emerging Devices
Location: Room B225
08:50
Quantifying the Figures of Merit of Graphene-Based Adiabatic Pass-XNOR Logic (PXL) Circuits (abstract)
09:10
3D Modeling of CNT Networks for sensing applications (abstract)
09:30
A Quantitative Approach to Testing in Quantum dot Cellular Automata: NanoMagnet Logic Case (abstract)
09:50
A Compact Model for Phase Change Memory Cells (abstract)
10:10-10:40Coffee Break
10:40-12:20 Session 14A: ADC/DAC/Mixed II
Chair: Marc Sabut
Location: Room B221
10:40
High Resolution Current-Mode CCO-Based Continuous Time Delta-Sigma Modulators for Sensor-Array Applications (abstract)
11:00
A 32-Channel 12-bits 65nm Wilkinson ADC for CMS Central Tracker (abstract)
11:20
Design of a Low-Power Calibratable Charge-Redistribution SAR ADC (abstract)
11:40
A 10 bit 12.8 MS/s SAR Analog-to-Digital Converter in a 250 nm SiGe BiCMOS Technology (abstract)
10:40-12:20 Session 14B: Voltage and Current References
Location: Petit Salon
10:40
Continuous Time Analog Filters Design in Nanometer-Scale CMOS Technologies (abstract)
11:20
A compact low-noise fully differential bandgap voltage reference with intrinsic noise filtering (abstract)
11:40
A 65nm CMOS Technology Radiation-Hard Bandgap Reference Circuit (abstract)
12:00
A modified CMOS nano-power resistorless current reference circuit (abstract)
10:40-12:20 Session 14C: RF/mmW Measurement & Modeling Techniques
Location: Room B225
10:40
Towards the determination of GaN HEMT large signal model parameters by Time Domain Reflectometry method (abstract)
11:00
A fast and functional technique for the noise figure measurement of differential amplifiers (abstract)
11:20
Half-Thru De-embedding Method for Millimeter- Wave and Sub-Millimeter-Wave Integrated Circuits (abstract)
11:40
Design of passive filters using dual-mode embedded dielectric resonator (abstract)
12:00
The Impact of the Q-Factor of the Parasitic Capacitances of RF Transistors on their Load Modulation Capabilities (abstract)
12:20-13:20Lunch Break
13:20-15:00 Session 15A: Device Technical Trends
Location: Room B221
13:20
Comprehensive Analysis of traps in InGaP/GaAs HBT by GR noise (abstract)
13:40
Optimization of Low-Resistance State Performance in Ge-rich GST Phase Change Memory (abstract)
14:00
Design Considerations for Monolithically Integrated Fully-Depleted CMOS Image Sensors (abstract)
14:20
TIA optimization for on-package multi-core optical network receivers (abstract)
14:40
Characterization and modeling of low frequency noise in 0.13 µm BiCMOS SiGe :C heterojunction bipolar trasnsistors (abstract)
13:20-15:00 Session 15B: Sensors on Flexible Substrate
Location: Petit Salon
13:20
Towards Flexible and Conformable Electronics (abstract)
14:00
Integrated Low-Noise Current Amplifier for Glass-Based Nanopore Sensing (abstract)
14:20
Bendable Piezoresistive Sensors by Screen Printing MWCNT/PDMS Composites on Flexible Substrates (abstract)
14:40
Thickness effects of ZnO thin films on flexible ozone sensors (abstract)
13:20-15:00 Session 15C: Analog Techniques
Location: Room B225
13:20
Temperature Study of High-Drive Capability Buffer for Phase Change Memories (abstract)
13:40
Large Bandwidth Tunable Analog Equalizers Based on an InP DHBT Differential Pair Amplifier Cell for 100-GBaud Communication Systems (abstract)
14:00
Low Power Inductor-less CML Latch and Frequency Divider for Full-Rate 20 Gbps in 28-nm CMOS (abstract)
14:20
A 2.4 GHz Fast Settling Wake-Up Receiver Frontend (abstract)
14:40
Design of a CMOS Image Sensor with a 10-bit Two-Step Single-Slope A/D Converter and a Hybrid Correlated Double Sampling (abstract)
15:00-16:00 Session 16: Closing Ceremony - Leaf Awards
Location: Petit Salon
16:00-16:20Coffee Break
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