PROGRAM FOR MONDAY, JUNE 30TH

ABSTRACT. We will present some general notions on IP rights, focused on patents. This will be followed by some details on how to proceed in order to obtain a patent and how a patent should be read. Finally we will look at what can be done with a patent. The general notions on IP rights will cover novelty, non-obviousness, excluded domains, territoriality and length of protection. After explaining the need to keep ideas secret before filing a patent application, we will look at how to conduct research in cooperation with other entities without making a divulgation that could invalidate a future patent application. The different steps during the examination procedure of a patent will be presented, from the filing of the patent application through to a decision to grant or reject the patent application, with the view of obtaining patents that are as strong as possible. After a presentation of the different parts of a patent, you will understand the steps for determining whether a product infringes a patent. Finally, we will present what a patentee can (and can't) do with his/her patent, taking into account other people’s patents.

ABSTRACT. We will present some general notions on IP rights, focused on patents. This will be followed by some details on how to proceed in order to obtain a patent and how a patent should be read. Finally we will look at what can be done with a patent. The general notions on IP rights will cover novelty, non-obviousness, excluded domains, territoriality and length of protection. After explaining the need to keep ideas secret before filing a patent application, we will look at how to conduct research in cooperation with other entities without making a divulgation that could invalidate a future patent application. The different steps during the examination procedure of a patent will be presented, from the filing of the patent application through to a decision to grant or reject the patent application, with the view of obtaining patents that are as strong as possible. After a presentation of the different parts of a patent, you will understand the steps for determining whether a product infringes a patent. Finally, we will present what a patentee can (and can't) do with his/her patent, taking into account other people’s patents.

ABSTRACT. The verification of today's complex mixed-signal SoCs poses majors difficulties: image sensors with several million pixels, RF tranceivers with GHz signals carrying thousands of symbols, heterogeneous systems with scattered time constants often suffer from some form of verification coverage reduction, resulting in design robustness degradation, unnecessary overdesign or even functional failures. This talk addresses application examples where the benefit of appropriate tools and methodologies for improved verification coverage is described.

Asygn provides design and design tool solutions for analog systems-on-chip and for systems based around advanced analog chip components, such as MEMs. Asygn was created on January 2nd, 2008.

ABSTRACT. The talk will deal with how ICs can address energy issues like the generation, the conversion, the use, the storage, of energy. Energy management is indeed a major issue for the world. Several domains are reviewed like equipment, buildings, lighting, transport, industry. Such a topic complements another important topic for ICs themselves: power. The second part will address new processes available from CMP, like a way to ultra ultra low-power ICs, PV and OPV on and above ICs, and 3D-ICs.

ABSTRACT. In the near future, a number of systems will be powered using energy constrained devices or scavenging technologies, enabling new applications such as medical monitoring, sensors and next-generation portable video gadgets. This will require the electronic circuits to operate with utmost energy efficiency while performing the required functionality. A major opportunity to reduce the energy consumption of digital circuits is to scale supply voltages below 0.4V driving them to sub- (or near-) threshold operation. This workshop presents the expected energy gain and challenges in the ultra-low-voltage (ULV) regime. Our recent ULV achievements will be then described in relation to specific standard cell libraries, adapted CAD margins and Sign-off and ULV digital demonstrators operating down to 0.3V. Last, the enhanced ULV performances offered by the FDSOI28 technology will be highlighted, in relation to an improved ION/IOFF ratio and sub-threshold slope, with promising Silicon results showcased near 0.35V.

ABSTRACT. The efficient power management of Ultra Low Power radio and microcontroller communication is key to enable Internet Of Things growth. This presentation explains the technical challenges of power delivery in a radio-connected microcontroller. DC-DC converters are used for best energy efficiency according to the battery specifications and the application power needs, but they inject unwanted noise into the sensitive RF blocks. Hence, sharing a power delivery system among analog-RF and digital cores requires to pay particular attention to noise coupling through the blocks supply, spurious injection from the power delivery system, and transient performance of the voltage regulators. Application examples are presented to illustrate these concepts.

ABSTRACT. Actually, in the mobile application area, the reduction of power consumption appears to be a bottleneck when designing transceiver architectures for those systems. This is especially true when considering two large parts of the actual electronics market: Wireless Sensors Networks (WSN) and Internet of Things (IoT). Both of them require wireless communications and a large autonomy while being battery-powered. In order to decrease power consumption, four main complementary approaches are possible at several levels: i) at the technological level with technologies such as SOI or FD-SOI, ii) at the circuit level where sub-threshold or current reuse topologies can be implemented, iii) at the system level where zero-IF or non-coherent architectures enable substantial power reduction and, iv) at the application level with accurate power management or power efficient protocols. Power gating is an often used technique and is implemented at the system or application level where the system is duty-cycled between two consecutive frames. Although power gating or clock gating are common techniques in digital area, power gating is rarely used at the symbol time scale in a RF design. Since the RF part consumes a large amount of the DC power, RF gating is a promising approach for Ultra Low Power systems. In this workshop we will present several approaches to implement RF power gating at the bit scale. We will specially present solutions in the case of the UWB Impulse Radio with their possible applications. The feasibility of RF gating for narrow band systems will also be discussed.