Po-Yao Chuang received his MSc and PhD in Electrical Engineering from the Department of Electrical Engineering, National Tsing Hua University, Taiwan, in 2017 and 2024, respectively. He is currently a researcher at IMEC in Leuven, Belgium. He received the Best Doctoral Thesis Award from the Taiwan IC Design Society in 2025 and was a semi-final winner in the E.J. McCluskey Contest at ETS 2025. Prior to graduation, he worked at MediaTek and TSMC as an intern and participated in several joint development projects focusing on cell-aware test and test quality improvements. He received the Best Paper Award from ATS in 2017. His research interests include IC testing, design-for-test, and automatic test pattern generation for 3D-stacked ICs.