Talk Keyword Index

TALK KEYWORD INDEX

This page contains an index consisting of author-provided keywords.

Shortcuts: 3 5 A B C D E F G H I K L M N O P Q R S T U V W Y

3
3-axis COTS accelerometers
5
5G/6G communications	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
A
Acoustic event classification	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Active antenna arrays	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
Adaptive Body-Biasing (ABB)	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Adaptive Thresholding	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
address event representation	Three decades of IMSE Neuromorphic Engineering Group
AES	A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
AI	Machine Learning-Based Physical Design of RFIC Transformers
Algorithm translation to state machines	Hardware implementation of the Hungarian algorithm for optimum task assignments
All-MOS	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
ANN	Machine Learning-Based Physical Design of RFIC Transformers
Antenna index detection	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
AoA	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
Approximate Computing	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Artificial intelligence	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration Machine Learning for Microwave Pixelated Structures Design
Artificial Neural Network	Machine Learning for Microwave Pixelated Structures Design
Artificial Neural Networks	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Artificial Neurons	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
ASCON	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
ASIC	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications A proof-of-concept ASIC RISC-V based SoC for Industrial Applications Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Assistive Technology	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
attice-Based Cryptography
Automated External Defibrillator
B
battery less	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
BiCMOS	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
Biosensors	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
Body-Bias Generator (BBGEN)	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
C
cadence	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
Capacitive Digital to Analog Converter (CDAC)	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
capacitor	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
CGRA	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
CGRAs	A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Characterization
Charge Pump	Novel methodology for optimization of Charge Pump efficiency
Charge transfer	Novel methodology for optimization of Charge Pump efficiency
Chronoamperometry	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
Circuit optimization	Novel methodology for optimization of Charge Pump efficiency
Circuit verification
Cloud security	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
CMOS
CMOS	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
CMOS design	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
CMOS technology
CNN-RNN architectures	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Combinatorial Optimization	Digital Ising-Based Solver for Scalable Max-Cut Optimization
Companding filter	CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
Complementary Metal Oxide Semiconductor (CMOS)	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
Computer simulation	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
Convolution	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
convolutional neural networks	A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks Efficient Neural Architectures for Acoustic Monitoring of Livestock
CORDIC algorithm	Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
COTS sensor
countermeasure
Critical systems
cryogenic	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
Cryogenic CMOS	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Cryptography	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Crystals-Kyber
current measurement instrument	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
Current readout IC	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
current source
D
D-band	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
data augmentation	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Data Extraction
deep learning	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
depth estimation	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Design Space Exploration	A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Digital circuit optimization	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
digital twin
Distributed Energy Resources	Electric vehicle emulator for study as a Distributed Energy Resource
Distributed fiber optic sensors
DNN acceleration	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
DTMOS	Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage
DTMOS Schmitt-Trigger	Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage
Duty Cycle Correction
Dynamic Comparator	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
dynamic vision sensor	Three decades of IMSE Neuromorphic Engineering Group
E
EDA
Edge AI	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Edge computing	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit
Electric Vehicle	Electric vehicle emulator for study as a Distributed Energy Resource
electrocardiogram	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Electrochemical sensing	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
Electromagnetic attack	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
ELIN circuits	CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
Embedded AI	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Embedded Systems	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Emulator	Electric vehicle emulator for study as a Distributed Energy Resource
Energy Efficiency	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit
energy harvesting	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
energy management	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
EW	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
F
Fast Front-end electronics
fault attack
Feature Extraction	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
fECG	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Fingerprint recognition	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
Floating-gate MOS (FGMOS)
FPGA	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection A proof-of-concept ASIC RISC-V based SoC for Industrial Applications Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
FPGA accelerator	Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
Full Adder comparison	Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage
Fully Depleted Silicon on Insulator (FDSOI)	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Fully-integrated LDO	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
G
G-band	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
Gaussian filter	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
Genetic Algorithm Optimization	A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Genetic Algorithms	Machine Learning for Microwave Pixelated Structures Design
Genetic Programming	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Gesture Recognition	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
goat vocalizations	Efficient Neural Architectures for Acoustic Monitoring of Livestock
H
Hardware Hungarian algorithm	Hardware implementation of the Hungarian algorithm for optimum task assignments
hardware protection
Hardware security	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Hardware synthesis of EFSM	Hardware implementation of the Hungarian algorithm for optimum task assignments
Hardware-Accelerated Algorithms	Digital Ising-Based Solver for Scalable Max-Cut Optimization
Hardware-aware NAS	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Heterogeneous Computing	A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
High accuracy	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
High efficiency	Novel methodology for optimization of Charge Pump efficiency
High throughput	Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
High-Level Synthesis	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
High-Performance Computing	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
hybrid architecture
Hyperparameter Search	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
I
Image Processing	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Industrial IoT	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Instruction Set Architecture Extensions	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
integrated circuits
Integrated Inverter	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
interface circuits
Internet of Things
Inverter-based Amplifier	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
IoT	Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
Ising Machines	Digital Ising-Based Solver for Scalable Max-Cut Optimization
K
K-band	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
K-best algorithm	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
L
Lateral Inhibition	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
Lightweight	A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
lightweight CNN	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Linux	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
LNA	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
log-Mel spectrogram	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Low area	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
low field mobility	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Low frequency	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Low power	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
Low power consumption	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
Low-dropout(LDO) regulator	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Low-power	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
low-precision	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
M
Machine Learning	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification Machine Learning-Based Physical Design of RFIC Transformers Machine Learning for Microwave Pixelated Structures Design
Macro Library
Max-Cut Optimization	Digital Ising-Based Solver for Scalable Max-Cut Optimization
MCU
Memristor	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
microcontroller
Microwaves	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
millimeter wave	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
MLIR	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
mmW	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
model efficiency	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Modified Integrated Zeta Inverter	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
Monitoring	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
Monte Carlo	Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage
Morphological Neural Networks	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit
morphology	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
MOS transistor modeling	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Movement Classification	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
Multilayer Perceptron (MLP)	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
multimodal imaging	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
N
Nano-oscillators	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
narrow pulses	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
Negative Sampler	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Neural Architecture Search	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Neural network hardware	Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Neural Networks	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification 1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Neuromorphic	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
neuromorphic computing
neuromorphic engineering	Three decades of IMSE Neuromorphic Engineering Group
Non-Invasive Systems
Non-linear systems	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
O
object detection	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
ONNX	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Operational Transconductance Amplifier (OTA)	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
Optical Character Recognition
Optimization methodology	Novel methodology for optimization of Charge Pump efficiency
organic electronics
Oscillator	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Over-the-air signals	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
P
Parallel programming	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
passive dosimetry
Passive Filters	Machine Learning for Microwave Pixelated Structures Design
Performance evaluation	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
photo-detector technology
photolithography mask design
Photovoltaic Systems	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
PLIC	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
PMUT Array Beamforming
Positron Emission Tomography
Post-Quantum Cryptography
Potentiostat	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
Power Electronics	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
power management integrated circuits	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
precision livestock farming	Efficient Neural Architectures for Acoustic Monitoring of Livestock
processing system
Profiling
protection
Q
QR decomposition	Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
Quantization	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
quantum	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
R
radiation sensor
radiation-induced soft error
radio-frequency	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
radiofrequency	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
radiometry	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
RBFNN	Machine Learning-Based Physical Design of RFIC Transformers
readout	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
Real-time	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
register	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Reinforcement Learning	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
RF	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
RF	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
RFIC	Machine Learning-Based Physical Design of RFIC Transformers
RISC-V	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation A proof-of-concept ASIC RISC-V based SoC for Industrial Applications A Lightweight AES Peripheral for RISC-V Cores and IoT Applications Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
RISCV	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
river basin
RTIC	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
RTOS	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
Rust	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
S
Safety-critical	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
sampled data
Schmitt-Trigger	Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage
scintillator
Semiconductor Devices	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
sensor
Side-channel attack	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
Side-Channel Attacks	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
SiGe	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
Signal classification	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
Signal detection	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
signal processing algorithm
Simulation
single-event transient
single-event upset
single-pole double-throw	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
Sinh-domain filter	CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
SiPM
SLIC	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
SNN	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
Sobel filter	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
SoC	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
SoC FPGA	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
soft error observation method
Software-defined radio	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
solar forecasting	Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
SOTM	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
Spacewire
Spatial modulation	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
SPDT	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
Spectrum monitoring	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
Spice Netlist
spiking convolution processors	Three decades of IMSE Neuromorphic Engineering Group
Spiking Neural Networks	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
Spin-Hall	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
Spin-torque	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
square-law detector	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
State-oriented programming	Hardware implementation of the Hungarian algorithm for optimum task assignments
STDP	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
Stochastic Computing	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Sub-100 mV	Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage
sub-basin
subthreshold swing	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Supply insensitivity	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Surface Electromyography (sEMG)	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
Switch	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
System call	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
T
Tabu Search	Digital Ising-Based Solver for Scalable Max-Cut Optimization
Telecommunication signals	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
Telemetry
Temperature sensor	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
Three Current-Mirror OTA	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
threshold voltage	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Timer	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
TOF-PET
Transformer	Machine Learning-Based Physical Design of RFIC Transformers
transmon	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
U
Ultra-Low Power	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Ultra-Low Power (ULP)	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
ultra-low quiescent-current	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
Underwater Acoustic Communication	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
Underwater Positioning Systems	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
V
V2X	Electric vehicle emulator for study as a Distributed Energy Resource
VGGish	Efficient Neural Architectures for Acoustic Monitoring of Livestock
VHDL	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
Video Action Recognition	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Visible light communication	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
VLSI	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit
Voltage-Controlled Delay Line (VCDL)
W
Wavelet transform	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
weak inversion	CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
Workload analysis	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
Y
YAMNet	Efficient Neural Architectures for Acoustic Monitoring of Livestock