DCIS2025: 40TH CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS

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Abella, Jaume	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
Abouchi, Nacer	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Acosta, Antonio J.	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Adin Marcos, Iñigo	Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
Agarwal, Mukul	Novel methodology for optimization of Charge Pump efficiency
Albertuz, Francisco	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
Alonso, Oscar	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Alonso, Sara	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Altet, Josep	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
Alves, Luís	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Araujo, José Angel	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Arjona, Rosario	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
Arroba, Patricia	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
Arteaga, Alejandro	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Artigas, José Ignacio	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
Astarloa, Armando	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Aunet, Snorre	Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage
Avedillo, María J.	Digital Ising-Based Solver for Scalable Max-Cut Optimization
B
Baena Oliva, Carmen	A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
Bai, Michel Justino	Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
Barba Romero, Jesús	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Baturone, Iluminada	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
Berenguer, Roc	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
Berenguer, Roc	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Bergmann, Tom	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Beriain, Andoni	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
Beriain Rodríguez, Andoni	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
Bermúdez Martín, Cristina	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
Bidarte, Unai	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Bispo, João	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Bonfiglio-Buendía, F.	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
Borromeo, Susana	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
Brea, Victor M.	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
C
Cabello, Diego	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
Calomarde, Antonio	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
Camuñas Mesa, Luis Alejandro	Three decades of IMSE Neuromorphic Engineering Group
Canals, Vincent	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Cano-Lozano, Pilar	Electric vehicle emulator for study as a Distributed Energy Resource
Cantero, David	Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Cardenas, Roman	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
Caro, Martí	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
Casado-Galán, Alejandro	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Castillo, Encarnación	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Cellier, Remy	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Celma, Santiago	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
Cesari, Joan	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit
Chatzipaschalis, Ioannis	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
Chavarrías, Miguel	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Chourasiya, Nikhil	Novel methodology for optimization of Charge Pump efficiency
Colombo, Martin Alejandro	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
Cordovilla Serrano, Marina	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Crespí-Castañer, Lluc	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Cruz Acosta, José Manuel	Machine Learning-Based Physical Design of RFIC Transformers Machine Learning for Microwave Pixelated Structures Design
Cuadrado, Carlos	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
D
Damiens, Joel	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
de Gracia Herranz, Amadeo	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
De la Rosa Utrera, José Manuel	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
de la Torre Las Heras, Jose Antonio	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
De Marziani, Carlos	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
de Mena Pacheco, Javier	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
Del Pino Suárez, Javier	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy Machine Learning-Based Physical Design of RFIC Transformers Machine Learning for Microwave Pixelated Structures Design
Del Rio, David	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
Deshpande, Prathamesh Satish	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
Dionizio, Anderson A.	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
Diéguez, Angel	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Dominguez-Cid, Samuel	Electric vehicle emulator for study as a Distributed Energy Resource
E
Escolar Diaz, María Soledad	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Esparza, Fermin	CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
Esteban-Eraso, Uxua	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
F
Fabre, Christian	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
Fernández, Pedro R.	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
Fernández, Víctor	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Fernández-García, Carlos	A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
Fernández-García, Natalia-Abel	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
Ferreira, José	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Fiorelli, Rafaella	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation Digital Ising-Based Solver for Scalable Max-Cut Optimization
Font-Rosselló, Joan	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Fontova-Musté, Pau	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
Fornt, Jordi	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
Frasser, Christian F.	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Fuguet, César	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
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Galante Sempere, David	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
Galarraga, Markel	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
Gallego, Juan	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
García, Antonio	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Garrido, Mario	Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA
Grandi, Giovanni	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
Guerrero, Juan Ignacio	Electric vehicle emulator for study as a Distributed Energy Resource
Gutierrez de Cabiedes, Borja	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
Gárate, José Ignacio	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
H
Hernandez Orellana, Carlos Ernesto	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Hernández, Pedro	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Hildebrand Rueda, Alfonso	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Hormigo, Javier	Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
Hormigo-Jimenez, Pablo	Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices
I
Iniesta, Silvia	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP
Inuoe, Rafael T.	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
Ituero, Pablo	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
J
Jiménez, Jaime	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Jiménez-Fernández, Carlos J	A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
Juárez, Eduardo	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
K
Katebzadeh, Maryam	A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Khalid, Muhammad Umer	Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage
L
L. Khemchandani, Sunil	Machine Learning-Based Physical Design of RFIC Transformers Machine Learning for Microwave Pixelated Structures Design
Lacouture, Stephane	A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI
Larios, Diego Francisco	Electric vehicle emulator for study as a Distributed Energy Resource
Laskowski Orlandi, Sofia Micaela	FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
Leal, Ainhoa	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Lefebvre, Charles-Alexis	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
León, Carlos	Electric vehicle emulator for study as a Distributed Energy Resource
Lima, Floriberto	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Lin, Bo-An	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
Linares-Barranco, Bernabe	Three decades of IMSE Neuromorphic Engineering Group
Liñán-Cembrano, Gustavo	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
Llobet, Didac	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms
Lopez-Martin, Antonio	CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning
Lopez-Vallejo, Marisa	Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System
Losada Gobantes, Markos	Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes
Lurz, Fabian	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
Lázaro, Jesús	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
López, P.	CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz
López Asunción, Samuel	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection
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Malagon, Pedro	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
Marrero, Gustavo	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Martín-González, Miguel	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Martín-Martín, Alberto	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Martínez, Victor	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Martínez de Ternero, Alejandro	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Martínez Lozano, Andrés	Efficient Neural Architectures for Acoustic Monitoring of Livestock
Merino-Fernández, Irene	Machine Learning-Based Physical Design of RFIC Transformers Machine Learning for Microwave Pixelated Structures Design
Meyer-Baese, Uwe	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Mira Serrano, Jose Luis	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Moll, Francesc	Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
Montal, Luis	A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Morán, Alejandro	A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Moya, Jose M.	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
Muguira, Leire	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications
Murano, Santiago	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
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Nerushenko, Aleksei	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Nieto, Rubén	FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems
Núñez Martínez, Juan	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation Digital Ising-Based Solver for Scalable Max-Cut Optimization
O
Oliveira da Silva, Sérgio A.	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
Otero, Andrés	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Otín, Aránzazu	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
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Padial-Allué, Rubén	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Pagan, Josue	RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers
Parra Fernández, Pilar	A Lightweight AES Peripheral for RISC-V Cores and IoT Applications
Parrilla, Luis	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Pascual, Jose A.	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
Passos, Fábio	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Paulino, Nuno	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation
Peralías, Eduardo	Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation
Perez Hernandez, Noemi	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
Perez-Cerrolaza, Jon	Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring
Personal, Enrique	Electric vehicle emulator for study as a Distributed Energy Resource
Potestad Ordóñez, Francisco Eugenio	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Pothuri, Sai Sumanth	Novel methodology for optimization of Charge Pump efficiency
Prades, Joan Daniel	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Pétrot, Frédéric	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
R
Ramos, Gesler	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
Reyes Cubas, Abel	A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy
Ribas-Xirgo, Lluís	Hardware implementation of the Hungarian algorithm for optimum task assignments
Rincon Calle, Fernando	Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning
Roca, Miquel	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Rodríguez, Alfonso	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
Román, Roberto	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
Rosa-Olmeda, Gonzalo	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Rosselló, Josep L.	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks
Rubio, Antonio	Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks
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Salas-Barenys, Arnau	A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit
Sampaio, Leonardo P.	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
Sanchez-Azqueta, Carlos	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
Sancho, Jaime	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Sannino, Andrea	An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications
Santos, Marcelino	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Sanz, César	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Sanz, Laura	Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Schoenfeldt, Stephan	Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition
Serrano-Gotarredona, Teresa	Three decades of IMSE Neuromorphic Engineering Group
Shahabi, Mehdi	A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems
Simões, Maria Clara	A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications
Solar, Hector	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK
Soler-Fernandez, Juan Luis	Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications
Sun, Chi-Tien	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
Suárez, Daniel	Video Action Recognition in SoC FPGAs driven by Neural Architectural Search
Suárez Bonilla, Félix David	Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification
Sánchez Espeso, Pablo	Efficient Neural Architectures for Acoustic Monitoring of Livestock
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Taigor, Subodh Prakash	Novel methodology for optimization of Charge Pump efficiency
Tejeda Campos, Sergio	Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System
Tena-Sánchez, Erica	Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks
Tomasi, Eduardo	HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation
Toral, Víctor	1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration
Torcal-Milla, Francisco José	Design of a CMOS Transmitter Chain for Satellite on the Move Communications
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Ugena, Alex	Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation
Urain, Alvaro	Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers
Urain, Alvaro	A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz
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Villa, Manuel	Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications
Vázquez, Daniel	Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization
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Westin, Óliver P.	Improved Modified Zeta Inverter for Single-Phase Grid-Tied System
Wu, Chih-Feng	A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems
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Ytterdal, Trond	Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage
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Zuloaga, Aitzol	A proof-of-concept ASIC RISC-V based SoC for Industrial Applications

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