PROGRAM
Days: Wednesday, November 26th Thursday, November 27th Friday, November 28th
Wednesday, November 26th
View this program: with abstractssession overviewtalk overview
10:30-11:00Coffee Break & Posters
11:00-12:30 Session 3A: Hardware and Software for RISC-V
Chairs:
| 11:00 | A proof-of-concept ASIC RISC-V based SoC for Industrial Applications (abstract) |
| 11:30 | Performance Analysis of Convolution Function for IA Edge Computing Acceleration using a 32-bit RISC-V CPU Implementation (abstract) |
| 12:00 | RISCV-SLIC: Rust Software Level Interrupt Controller for RISCV microcontrollers (abstract) |
11:00-12:30 Session 3B: Sensing
Chairs:
| 11:00 | An Improved Discrete Time Amplifier-Less Potentiostat Architecture for Metabolic Sensing Applications (abstract) |
| 11:30 | Learning to Sense Sustainably: RL-Based Control for Solar-Powered IoT Nodes (abstract) |
| 12:00 | A built-in CMOS temperature sensor for On-Chip Thermal Monitoring from 0ºC to 100ºC with a 0.137ºC of Innacuracy (abstract) |
12:30-14:00 Session 4A: Security and Power Systems
Chairs:
| 12:30 | Electromagnetic Side-Channel Attack on a Cloud-Based Fingerprint Recognition System (abstract) |
| 13:00 | Low Entropy Masking Protection Scheme for ASCON Cipher to Counteract Side-Channel Attacks (abstract) |
| 13:15 | A Lightweight AES Peripheral for RISC-V Cores and IoT Applications (abstract) |
| 13:45 | Electric vehicle emulator for study as a Distributed Energy Resource (abstract) |
12:30-14:00 Session 4B: Signal Processing and Power Systems
Chairs:
| 12:30 | FPGA Architectures for Reliable Transmission of Pre-Stored Acoustic Signals in Underwater Localization Systems (abstract) |
| 13:00 | CMOS Micropower Current-Mode Sinh-Domain Filter with Multidecade Tuning (abstract) |
| 13:30 | Improved Modified Zeta Inverter for Single-Phase Grid-Tied System (abstract) |
14:00-15:30Lunch
15:30-17:00 Session 5A: AI Circuits and Systems
Chairs:
| 15:30 | Efficient Neural Architectures for Acoustic Monitoring of Livestock (abstract) |
| 16:00 | 1-D Convolutional Autoencoder for Fetal and Maternal ECG Classification Oriented to Hardware Implementation Acceleration (abstract) |
| 16:30 | Approximate Circuits versus Quantization for Energy Efficient Deep Neural Networks (abstract) |
15:30-17:00 Session 5B: Neuromorphic Circuits, Systems and Technologies I
Chair:
| 15:30 | Character Recognition Application of a Neural Circuit Including Lateral Inhibitory Mechanisms (abstract) |
| 16:00 | A 0.78 TOPS/W 180nm Stochastic Computing-based Neuromorphic Circuit (abstract) |
| 16:30 | A Comparative Analysis of Bipolar and Sign-Magnitude Stochastic Computing Approaches in Quantized Neural Networks (abstract) |
17:00-18:30 Session 6A: System-Level Analysis and Exploration
Chairs:
| 17:00 | Three decades of IMSE Neuromorphic Engineering Group (abstract) |
| 17:30 | Full-Integer Spiking Neural Network Inference with RISC-V ISA Extensions for Radar-based Gesture Recognition (abstract) |
| 18:00 | Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection (abstract) |
17:00-18:30 Session 6B: Neuromorphic Circuits, Systems and Technologies II
Chair:
| 17:00 | Analyzing Linux System Call Variability: Real-Time Patch Impact and System Call Monitoring (abstract) |
| 17:30 | HPC Workload Analysis Using Distributed Cross-ISA Binary Instrumentation (abstract) |
| 18:00 | Exploring Design Spaces in Embedded Systems: An Approach Based on Genetic Programming, Particle Swarm and Reinforcement Learning (abstract) |
Thursday, November 27th
View this program: with abstractssession overviewtalk overview
10:30-11:00Coffee Break &Posters
11:00-12:30 Session 9A: AI-Driven Development of High-Performance Electronic Systems and Applications-1
Chairs:
| 11:00 | Video Action Recognition in SoC FPGAs driven by Neural Architectural Search (abstract) |
| 11:30 | Deep Learning-Based Depth Estimation for Facial Morphology Characterization in Neurosurgery Applications (abstract) |
| 12:00 | Multi-Domain Feature Extraction for ML-Based Over-the-Air RF Signal Classification (abstract) |
11:00-12:30 Session 9B: Monitoring and Control
Chairs:
| 11:00 | Nano-Oscillator Output Signal Monitoring Technique: Method and Device Implementation (abstract) |
| 11:30 | Ultra-Narrow Current Pulses Measurement Using a Cost-Effective Instrumentation System (abstract) |
| 11:45 | Sub-nW Thyristor Based Wake-Up Timer for Low Duty Cycle IoT Sensing Applications (abstract) |
| 12:15 | A 4×4 K-best Spatial Modulation MIMO Detection for Visible Light Communication Systems (abstract) |
12:30-14:00 Session 10A: Circuit Design and Analysis
Chairs:
| 12:30 | Digital Ising-Based Solver for Scalable Max-Cut Optimization (abstract) |
| 13:00 | Comparative Analysis of Full Adders based on DTMOS Schmitt-Trigger Standard Cells Operating at Sub-100 mV Supply Voltage (abstract) |
| 13:30 | Machine Learning-Based Physical Design of RFIC Transformers (abstract) |
12:30-14:00 Session 10B: Powering circuits
Chairs:
| 12:30 | Novel methodology for optimization of Charge Pump efficiency (abstract) |
| 13:00 | A 65nm CMOS Ultra-Low-Quiescent-Current On-Chip PMIC for Energy-Limited Harvesting Systems (abstract) |
| 13:30 | A 300mA Fully-Integrated Inverter-Based LDO with Enhanced Supply Insensitivity for Smart Edge AI Applications (abstract) |
14:00-15:30Lunch
15:30-17:30 Session 11: Industry-University Collaboration and Technology Transfer
In this panel, the MicroNanoSpain Competence center will be presented. Then, the panelists will presents their points of view about industry-university cooperation opportunities in electronic and microelectronic research and training:
- Alfonso Gabarron, AESEMI & MicroNanoSpain Competence Center
- Ana Peláez, Maxwell
- Eduardo Casanueva, INDRA
- Constantino Ruiz, AWGE
Chair:
Friday, November 28th
View this program: with abstractssession overviewtalk overview
09:00-10:30 Session 13
Keynote: TBD
10:30-11:00Coffee Break & Posters
11:00-12:30 Session 14A: Hardware Accelerators
Chairs:
| 11:00 | Hardware-Efficient Gaussian and Sobel Filters for Real-Time Image Processing on FPGA (abstract) |
| 11:30 | Hardware implementation of the Hungarian algorithm for optimum task assignments (abstract) |
| 12:00 | Configurable Ultra-High-Throughput QRD FPGA Accelerators for small matrices (abstract) |
| 12:15 | FPGA-Based Implementation of sEMG Feature Extraction and Movement Classification with MLP (abstract) |
11:00-12:30 Session 14B: RF & Communications
Chairs:
| 11:00 | Design of a CMOS Transmitter Chain for Satellite on the Move Communications (abstract) |
| 11:30 | Design of a 160-210 GHz SiGe HBT Square-Law Detector for Total Power Radiometers (abstract) |
| 12:00 | CMOS SPDT Switch Topologies in the Frequency Range of 6 to 20 GHz (abstract) |
12:30-14:00 Session 15A: AI-Driven Development of High-Performance Electronic Systems and Applications-2
| 12:30 | Acceleration of C/C++ Kernels and ONNX Models on CGRAs with MLIR-Based Compilation (abstract) |
| 13:00 | A Framework for Automated CGRA Design Space Exploration with Genetic Algorithm Optimization (abstract) |
| 13:30 | Machine Learning for Microwave Pixelated Structures Design (abstract) |
12:30-14:00 Session 15B: Quantum and low power
Chairs:
| 12:30 | A 1.15 mW SiGe BiCMOS Cryogenic LNA for Superconducting Qubit Readout with 4.5 K Noise Temperature from 4 to 9 GHz (abstract) |
| 13:00 | A Methodology for Cryogenic Modeling of CMOS Technology Based on BSIM-BULK (abstract) |
| 13:15 | Robust DTMOS Schmitt-Trigger Circuits in 130 nm SOI CMOS for Sub-100 mV Supply Voltage (abstract) |
| 13:45 | A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI (abstract) |
14:30-16:00Lunch