PROGRAM
Days: Tuesday, July 17th Wednesday, July 18th Thursday, July 19th
Tuesday, July 17th
View this program: with abstractssession overviewtalk overview
Wednesday, July 18th
View this program: with abstractssession overviewtalk overview
09:15-10:15 Session 2: "How we move: From single cells to whole brain networks" - Keynote Address by Prof. Dr. Chris de Zeeuw
Chair:
Location: Templar's
10:45-12:05 Session 3: Error Models & Reliability Evaluation
Chair:
Location: Templar's
10:45 | Fast Estimations of Failure Probability Over Long Time Spans (abstract) |
11:05 | A Probabilistic Error Model and Framework for Approximate Booth Multipliers (abstract) |
11:25 | Variability-Tolerant Memristor-based Ratioed Logic in Crossbar Array (abstract) |
11:45 | High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States (abstract) |
12:10-13:00 Session 4: Neural Circuits & Applications
Chair:
Location: Templar's
12:10 | An aging resilient neural network arcitecture (abstract) |
12:30 | Overcoming Crossbar Nonidealities in Binary Neural Networks Through Learning (abstract) |
12:45 | Real-Time Trainable Data Converters for General Purpose Applications (abstract) |
14:30-15:45 Session 5: Non-CMOS Logic Circuits
Chair:
Location: Templar's
14:30 | Programmable Molecular-Nanoparticle Multi-junction Networks for Logic Operations (abstract) |
14:50 | Multi-Valued Logic Circuits on Graphene Quantum Point Contact Devices (abstract) |
15:10 | Sequential Circuit Design with Bilayer Avalanche Spin Diode Logic (abstract) |
15:25 | Complementary Arranged Graphene Nanoribbon-based Boolean Gates (abstract) |
16:15-17:35 Session 6: Advanced Memory Architectures
Chair:
Location: Templar's
16:15 | CCE: A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded Systems (abstract) |
16:35 | Regular Expression Matching with Memristor TCAMs for Network Security (abstract) |
16:55 | Ring-Shaped Racetrack Memory: From Circuits and Systems Perspective (abstract) |
17:15 | A Novel Cross-point MRAM with Diode Selector Capable of High-Density, High-Speed, and Low-Power In-Memory Computation (abstract) |
Thursday, July 19th
View this program: with abstractssession overviewtalk overview
09:00-10:00 Session 7: "Nanoscale nonvolatile memories" - Keynote Address by Dr. Panagiotis Dimitrakis
Chair:
Location: Templar's
10:25-11:40 Session 8: Crossbar-based Architectures
Chair:
Location: Templar's
10:25 | Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices (abstract) |
10:45 | Quantum-dot Cellular Automata RAM design using Crossbar Architecture (abstract) |
11:05 | Integrated Synthesis Methodology for Crossbar Arrays (abstract) |
11:25 | Minimal Disturbed Bits in Writing Resistive Crossbar Memories (abstract) |
11:45-13:00 Session 9: Novel Hardware Structures & Computation Paradigms
Chair:
Location: Templar's
11:45 | A Recursive Growing & Featuring Mechanism for Nanocomputing Structures (abstract) |
12:05 | Free BDD based CAD of Compact Memristor Crossbars for in-Memory Computing (abstract) |
12:25 | Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic Circuits (abstract) |
12:45 | A Novel Analog to Digital Conversion Concept with Crosstalk Computing (abstract) |
14:30-15:45 Session 10: Energy Effective Architectures
Chair:
Location: Templar's
14:30 | Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies (abstract) |
14:50 | Energy-Efficient 4T-based SRAM Bitcell for Ultra-Low-Voltage Operations in 28 nm 3D CoolCubeTM Technology (abstract) |
15:10 | Energy-efficient MFCC extraction architecture in mixed-signal domain for automatic speech recognition (abstract) |
15:25 | Power Analysis of an mRNA-Ribosome System (abstract) |
16:15-17:35 Session 11: Quantum Device based Computing & Architectures
Chair:
Location: Templar's
16:15 | Controlling distilleries in fault-tolerant quantum circuits: problem statement and analysis towards a solution (abstract) |
16:35 | Signal Synchronization in Large Scale Quantum-dot Cellular Automata Circuits (abstract) |
16:55 | Size Optimization of MIGs with an Application to QCA and STMG Technologies (abstract) |
17:15 | Representation of Qubit States using 3D Memristance Spaces: A first step towards a Memristive Quantum Simulator (abstract) |