Zhiteng Chao is a Ph.D. at the Institute of Computing Technology, Chinese Academy of Sciences. His research focuses on improving Structured Automatic Test Pattern Generation (ATPG), with particular attention to optimizing test pattern generation for integrated circuits. He is also exploring the application of heterogeneous computing in Design for Test (DFT) processes and the use of SAT (Satisfiability) solution methods to enhance ATPG algorithms. His work aims to advance the efficiency and effectiveness of testing and reliability in semiconductor designs.