EWDTS 2026: 2026 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM

A
Abdiyeva, Khabiba	A Multimodal Machine Learning Framework for Personalized Perioperative Risk Prediction in Endometrial Cancer Surgery A Multiparametric Machine-Learning Framework for Predicting Complete Cytoreduction and Personalizing Treatment Selection in Advanced Epithelial Ovarian Cancer A Lightweight Full-Scale Skip-Connected U-Net with Classification Guidance and a Hybrid Loss for Tumor Region Segmentation in Mammography Images
Akbari, Ehsan	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Alamolhoda, Paniz	Hierarchical Power Exploration and Optimization of A RISC-V Processor
Avagyan, Narek	Routing Optimization with the Use of Modern Machine Learning Algorithms
Avetisyan, Armine	Machine Learning-Assisted Design of Electromagnetic Systems Parametric Analysis of Nonuniform Winding Distribution in a Lifting Electromagnet
Avetisyan, Ashot	Probabilistic Spin-Logic Implementations of AES S-Boxes: Enhancing Security Against Differential Power Analysis
Azad, Abolfazl	Hierarchical Power Exploration and Optimization of A RISC-V Processor
Azizbekyan, Sargis	Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms
Azizbekyan, Sargis	Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
B
Balu, Jothi Ramalingam	Open-Source Formal Equivalence as an Oracle for LLM-Generated RTL – Verdict Anatomy over 8,000 Checks
Beridze, Besik	Automated Detection of Logical Anomalies in Network Access Control Lists: A Set-Theoretic Approach
Beridze, Vakhtang	Iterative Algorithm for a Nonlocal Contact Problem for the Modified Helmholtz Equation
Bronnikov, Artem	Path-planning simulation for logistic robotic workspaces
C
Cakar, Burak Yakup	Lifecycle of an Educational CPU: From RTL to Silicon Validation
D
Damodaran, Shanmugapriyaa	Open-Source Formal Equivalence as an Oracle for LLM-Generated RTL – Verdict Anatomy over 8,000 Checks How Strong Are the Reference Testbenches of VerilogEval v2 and RTLLM v2.0? A Mutation-Based Audit
Davitadze, Zaza	A Standalone ESP32-Based NFC Terminal for Platform-Independent Integration: Hardware Architecture, Non-Blocking Firmware, and Field Deployment
Davronov, Bekzod	A Multimodal Machine Learning Framework for Personalized Perioperative Risk Prediction in Endometrial Cancer Surgery
Davronova, Oybarchin	A Multiparametric Machine-Learning Framework for Predicting Complete Cytoreduction and Personalizing Treatment Selection in Advanced Epithelial Ovarian Cancer
Devadze, David	Iterative Algorithm for a Nonlocal Contact Problem for the Modified Helmholtz Equation
Dhal, Pinakee Prasad	How Strong Are the Reference Testbenches of VerilogEval v2 and RTLLM v2.0? A Mutation-Based Audit
Di Pietrantonio, Giovanni	Role of Power Supply Voltage in Laser-Induced SEL in a 130 nm PLL Circuit
Djigan, Victor	Circular/Cylindrical Adaptive Arrays for Navigation Signal Receivers
Donadze, Mikheil	Automated Detection of Logical Anomalies in Network Access Control Lists: A Set-Theoretic Approach
Dyka, Zoya	Role of Power Supply Voltage in Laser-Induced SEL in a 130 nm PLL Circuit
E
Esankulov, Mukhammad	A Multiparametric Machine-Learning Framework for Predicting Complete Cytoreduction and Personalizing Treatment Selection in Advanced Epithelial Ovarian Cancer
Esankulova, Bustonoy	A Multimodal Machine Learning Framework for Personalized Perioperative Risk Prediction in Endometrial Cancer Surgery A Multiparametric Machine-Learning Framework for Predicting Complete Cytoreduction and Personalizing Treatment Selection in Advanced Epithelial Ovarian Cancer
Eskandari, Sara	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
F
Faramehr, Kiana	Hierarchical Power Exploration and Optimization of A RISC-V Processor
Farhadi Jahroodi, Mohammad Moeen	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Fazel Maragheh, Ali	A Hardware-Accelerated Quantized CNN Architecture for MNIST Classification Using RISC-V Customization
Fazilov, Shavkat	A Lightweight Full-Scale Skip-Connected U-Net with Classification Guidance and a Hybrid Loss for Tumor Region Segmentation in Mammography Images
Fernandez-Maloigne, Christine	A Lightweight Full-Scale Skip-Connected U-Net with Classification Guidance and a Hybrid Loss for Tumor Region Segmentation in Mammography Images
G
Gajendran, Rekha	How Strong Are the Reference Testbenches of VerilogEval v2 and RTLLM v2.0? A Mutation-Based Audit
Gevorgyan, Shushanna	Hierarchical Restructuring of Flat Decoder Architectures: Design and Performance Analysis
Ghazaryan, Artur	Routing Optimization with the Use of Modern Machine Learning Algorithms
Ghazaryan, Elen	Machine Learning-Based Multi-Objective Graph Partitioning for Distributed Simulation of Large-Scale Circuits
Ghukasyan, Artur	Comprehensive Analysis of Fault Modeling and Test Strategies for Advanced Die-to-Die Interconnects Accelerated Memory Fault Modeling and Test Algorithm Generation through Automated Inductive Analysis
Ghukasyan, Sevak	THE LEAKAGE MINIMIZATION METHOD FOR THE TRANSMISSION GATE DESIGN WITH THIN OXIDE TRANSISTORS
Goren, Sezer	Lifecycle of an Educational CPU: From RTL to Silicon Validation
Grigoryan, Areg	Machine Learning-Assisted Design of Electromagnetic Systems Parametric Analysis of Nonuniform Winding Distribution in a Lifting Electromagnet
Grigoryan, Gurgen	Operating-Point-Aware Aging Performance Monitoring And Adaptive Compensation For Analog Integrated Circuits Adaptive Stress Redistribution For Improving The Long-Term Reliability Of Analog CMOS Integrated Circuits
Grigoryan, Mushegh	Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms
Grigoryan, Mushegh	Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
H
Hajizadeh Moghaddam, Amirali	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Han, Shuo	PAC-GAT: Physics-Aware Graph Transfer Learning for Data-Efficient Cross-Technology Analog Performance Prediction
Harutyunyan, Ashot	Efficient Multi-Die 3D IC Routing Tool with Spanning-Graph-Based Obstacle-Avoiding Steiner Tree Construction
Harutyunyan, Eduard	Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
Hejazi, Kian	Hierarchical Power Exploration and Optimization of A RISC-V Processor
Herzel, Frank	Role of Power Supply Voltage in Laser-Induced SEL in a 130 nm PLL Circuit
Houraniah, Ahmad	RFCA: Reusing Fused Multiply-Add between the CPU and the Accelerator
Hovhannisyan, Arsen	Machine Learning-Assisted Design of Electromagnetic Systems Parametric Analysis of Nonuniform Winding Distribution in a Lifting Electromagnet
Hovhannisyan, Vardan	Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms
Hovhannisyan, Vardan	Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
Hovsepyan, Anna	Machine Learning-Assisted Design of Electromagnetic Systems
Huang, Zhenglei	Spatial Index Performance Comparison for Connectivity Tracing in Static VLSI Layouts
I
Iremadze, Oleg	A Standalone ESP32-Based NFC Terminal for Platform-Independent Integration: Hardware Architecture, Non-Blocking Firmware, and Field Deployment
J
Jahanpeima, Zahra	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Jahanpeima, Zahra	Hierarchical Power Exploration and Optimization of A RISC-V Processor
Jamali, Fatemeh	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Jangoan, Suhas	Open-Source Formal Equivalence as an Oracle for LLM-Generated RTL – Verdict Anatomy over 8,000 Checks
Jeyaraman, Jawaharbabu	How Strong Are the Reference Testbenches of VerilogEval v2 and RTLLM v2.0? A Mutation-Based Audit
Joneidi Jafari, Mohammad Moein	Hierarchical Power Exploration and Optimization of A RISC-V Processor
K
Karapetian, Lavrentii	Physical Modeling and TCAD Simulation of p-GaN Gate HEMT Structures for Microwave Applications Physics Based TCAD Extraction of Breakdown Voltage Limiting Factors in p-GaN Gate HEMTs
Khachatryan, Rafayel	Efficient Multi-Die 3D IC Routing Tool with Spanning-Graph-Based Obstacle-Avoiding Steiner Tree Construction TSV Assignment in 3DIC Based on SAT Solvers
Khachatryan, Tigran	Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms
Khachatryan, Tigran	Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
Khachikyan, Andreas	Parser Faults and Document Faults: Extracting Oncology Data from Armenian Template-Based Discharge Summaries with Rules and a Local LLM
Khoshroo, Mohammad	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Kord Katool, Elyar	A Hardware-Accelerated Quantized CNN Architecture for MNIST Classification Using RISC-V Customization
Kotapati, Vijaya Bhaskara Rao	Open-Source Formal Equivalence as an Oracle for LLM-Generated RTL – Verdict Anatomy over 8,000 Checks
Kurt, Deniz	Shrinking RISC-V Cores Through Huffman Re-Encoding of Instructions
L
Li, Jiajun	PAC-GAT: Physics-Aware Graph Transfer Learning for Data-Efficient Cross-Technology Analog Performance Prediction
Li, Kang	Operating-Point-Aware Aging Performance Monitoring And Adaptive Compensation For Analog Integrated Circuits Routing Optimization with the Use of Modern Machine Learning Algorithms Adaptive Stress Redistribution For Improving The Long-Term Reliability Of Analog CMOS Integrated Circuits PAC-GAT: Physics-Aware Graph Transfer Learning for Data-Efficient Cross-Technology Analog Performance Prediction Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection Spatial Index Performance Comparison for Connectivity Tracing in Static VLSI Layouts
Lin, Gwendolyn Claire	Driving Innovation in Organic Light-Emitting Diode Technology: A Case Study of Strategic Approaches in Advancing OLED Systems Architectural Innovations and Engineering Strategies in 3D V-NAND Flash Memory: From Planar Scaling Limitations to Advanced Integration
M
Ma, Xueyuan	PAC-GAT: Physics-Aware Graph Transfer Learning for Data-Efficient Cross-Technology Analog Performance Prediction
Ma, Xueyuan	Spatial Index Performance Comparison for Connectivity Tracing in Static VLSI Layouts
Ma, Xueyuan	Spatial Index Performance Comparison for Connectivity Tracing in Static VLSI Layouts
Mahmoudi, Kosar	A Hardware-Accelerated Quantized CNN Architecture for MNIST Classification Using RISC-V Customization
Mansoury, Mahdi	A Hardware-Accelerated Quantized CNN Architecture for MNIST Classification Using RISC-V Customization
Mardoyan, Mariam	Probabilistic Spin-Logic Implementations of AES S-Boxes: Enhancing Security Against Differential Power Analysis
Melikyan, Anush	Routing Optimization with the Use of Modern Machine Learning Algorithms
Melikyan, Shavarsh	Operating-Point-Aware Aging Performance Monitoring And Adaptive Compensation For Analog Integrated Circuits Adaptive Stress Redistribution For Improving The Long-Term Reliability Of Analog CMOS Integrated Circuits
Melikyan, Vazgen	PAC-GAT: Physics-Aware Graph Transfer Learning for Data-Efficient Cross-Technology Analog Performance Prediction Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
Melikyan, Vazgen	Spatial Index Performance Comparison for Connectivity Tracing in Static VLSI Layouts
Melkonyan, Tatevik	Machine Learning-Assisted Design of Electromagnetic Systems
Mirmohammadi, Mina	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Misaghi, Faezeh	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Mkhitaryan, Arthur	Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
Mkhitaryan, Arthur	Hierarchical Restructuring of Flat Decoder Architectures: Design and Performance Analysis
Moumeni, Amir Abbas	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Muthuvel, Kumarasenthil	Open-Source Formal Equivalence as an Oracle for LLM-Generated RTL – Verdict Anatomy over 8,000 Checks How Strong Are the Reference Testbenches of VerilogEval v2 and RTLLM v2.0? A Mutation-Based Audit
N
Nahvy, Alireza	Run-time Configurable CORDIC Accelerator for DSP and ML Applications A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Naltakyan, Narek	Parser Faults and Document Faults: Extracting Oncology Data from Armenian Template-Based Discharge Summaries with Rules and a Local LLM Comparative Evaluation of Offline and Online Authorization for AI Agents under Authorization-Server Failure
Navabi, Zainalabedin	Hierarchical Power Exploration and Optimization of A RISC-V Processor Run-time Configurable CORDIC Accelerator for DSP and ML Applications A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Nevliudov, Igor	Path-planning simulation for logistic robotic workspaces
P
Palanichamy, Manikandan	Driving Innovation in Organic Light-Emitting Diode Technology: A Case Study of Strategic Approaches in Advancing OLED Systems Architectural Innovations and Engineering Strategies in 3D V-NAND Flash Memory: From Planar Scaling Limitations to Advanced Integration
Petrosyan, Nonna	Cross-Technology RTL Timing Prediction Using Multilayer Neural Network
Petrosyan, Nonna	Routing Optimization with the Use of Modern Machine Learning Algorithms
Petryk, Dmytro	Role of Power Supply Voltage in Laser-Induced SEL in a 130 nm PLL Circuit
Phartenadze, Guladi	Iterative Algorithm for a Nonlocal Contact Problem for the Modified Helmholtz Equation
Q
Qodirov, Asliddin	A Multiparametric Machine-Learning Framework for Predicting Complete Cytoreduction and Personalizing Treatment Selection in Advanced Epithelial Ovarian Cancer A Lightweight Full-Scale Skip-Connected U-Net with Classification Guidance and a Hybrid Loss for Tumor Region Segmentation in Mammography Images
R
Rajabalipanah, Maryam	Hierarchical Power Exploration and Optimization of A RISC-V Processor Run-time Configurable CORDIC Accelerator for DSP and ML Applications
S
Safari, Saeed	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Sanjari, Minoo	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Sarpoolaki, Tara	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Semsar Parapari, Elmira	A Hardware-Accelerated Quantized CNN Architecture for MNIST Classification Using RISC-V Customization
Sheikhshoaei, Fatemeh	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
Smirnov, Sergey	Circular/Cylindrical Adaptive Arrays for Navigation Signal Receivers
Subramani, Senthil Kumar	Open-Source Formal Equivalence as an Oracle for LLM-Generated RTL – Verdict Anatomy over 8,000 Checks
T
T. Rys, Szymon	Driving Innovation in Organic Light-Emitting Diode Technology: A Case Study of Strategic Approaches in Advancing OLED Systems
Tasmagambetov, Andrey	Circular/Cylindrical Adaptive Arrays for Navigation Signal Receivers
Tonoyan, Smbat	Comparative Evaluation of Offline and Online Authorization for AI Agents under Authorization-Server Failure
Tsarik, Vladimir	Circular/Cylindrical Adaptive Arrays for Navigation Signal Receivers
Tshagharyan, Grigor	Comprehensive Analysis of Fault Modeling and Test Strategies for Advanced Die-to-Die Interconnects Accelerated Memory Fault Modeling and Test Algorithm Generation through Automated Inductive Analysis
Tsymbal, Oleksandr	Path-planning simulation for logistic robotic workspaces
U
Ugurdag, Fatih	Lifecycle of an Educational CPU: From RTL to Silicon Validation RFCA: Reusing Fused Multiply-Add between the CPU and the Accelerator Shrinking RISC-V Cores Through Huffman Re-Encoding of Instructions
Ulmasov, Firdavs	A Multimodal Machine Learning Framework for Personalized Perioperative Risk Prediction in Endometrial Cancer Surgery
V
Vahanyan, Anna	Routing Optimization with the Use of Modern Machine Learning Algorithms
Vahida, Parisa	Run-time Configurable CORDIC Accelerator for DSP and ML Applications
W
Weng, Yin-Shi	Architectural Innovations and Engineering Strategies in 3D V-NAND Flash Memory: From Planar Scaling Limitations to Advanced Integration
Y
Yahyapour, Mohammad	A Hardware Scheduler and Task Dispatcher Forming a Hybrid ML Accelerator
Yildiz, Abdullah	Lifecycle of an Educational CPU: From RTL to Silicon Validation
Yue, Hao	Routing Optimization with the Use of Modern Machine Learning Algorithms
Yue, Xao	Operating-Point-Aware Aging Performance Monitoring And Adaptive Compensation For Analog Integrated Circuits Adaptive Stress Redistribution For Improving The Long-Term Reliability Of Analog CMOS Integrated Circuits
Yurtsever, Ozan	RFCA: Reusing Fused Multiply-Add between the CPU and the Accelerator
Yusupov, Ozod	A Lightweight Full-Scale Skip-Connected U-Net with Classification Guidance and a Hybrid Loss for Tumor Region Segmentation in Mammography Images
Z
Zhan, Hongliang	PAC-GAT: Physics-Aware Graph Transfer Learning for Data-Efficient Cross-Technology Analog Performance Prediction
Zhang, Ran	Spatial Index Performance Comparison for Connectivity Tracing in Static VLSI Layouts
Zheng, Xuefeng	Operating-Point-Aware Aging Performance Monitoring And Adaptive Compensation For Analog Integrated Circuits Routing Optimization with the Use of Modern Machine Learning Algorithms Adaptive Stress Redistribution For Improving The Long-Term Reliability Of Analog CMOS Integrated Circuits Real-Time Electro-Optical Object Tracking on NVIDIA Jetson Orin NX: A World-Angle Estimation Architecture for Encoder-Instrumented Pan–Tilt–Zoom Platforms Evaluation of Feature Pyramid Fusion Levels for RGB-IR UAV Detection
Zolfy Lighvan, Mina	A Hardware-Accelerated Quantized CNN Architecture for MNIST Classification Using RISC-V Customization
Zorian, Yervant	Comprehensive Analysis of Fault Modeling and Test Strategies for Advanced Die-to-Die Interconnects Accelerated Memory Fault Modeling and Test Algorithm Generation through Automated Inductive Analysis
Å
Å. Halvorsen, Renate	Driving Innovation in Organic Light-Emitting Diode Technology: A Case Study of Strategic Approaches in Advancing OLED Systems

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