Investigation of Nanowire Crosstalk through an Ab-Initio EM/QM Simulation Framework
ABSTRACT. The ongoing miniaturization of local interconnects in advanced packaging technology highlights the need for new models which accurately capture all pertinent electromagnetic (EM) and quantum mechanical (QM) phenomena. In particular, near-field coupling effects between closely spaced nanowires strongly affect the global electron dynamics and vice versa. In this work, we study this crosstalk between two nanowires using a novel first-principles EM/QM co-simulation technique which fully captures the physics of the system. The proposed EM/QM modeling technique is validated through a comparison between the Lorenz- and Coulomb-gauge formulations of a two-wire system in resonance. Finally, as an application, the Lorenz-gauge method is used to investigate and explain counterintuitive effects of the inter-wire crosstalk on the induced electric field near the wire centers.
Tensor-Train Accelerated Solution of Three-Dimensional Volume Integral Equations in Modeling of Optical Interconnects
ABSTRACT. A tensor-train (TT) acceleration scheme is presented for Method of Moments (MoM) discretization of the full-wave three-dimensional vector volume integral equation (VIE) on Cartesian voxel grids. The material contrast, incident field, nine dyadic Green-function blocks, and three electric-field components are stored and processed directly in compressed form, avoiding assembly of the dense Method-of-Moments matrix. Binary tensorization supports rectangular power-of-two domains while preserving cubic voxels and the complete 3x3 Cartesian coupling. The resulting system is solved by the alternating minimal energy (AMEn) method with progressive recompression and memory-aware local linear algebra. When the TT ranks remain bounded, storage and the principal tensor operations grow with the number of binary modes, and hence logarithmically with the voxel count. The method is demonstrated on the example of the optical interconnect exceeding 209 wavelengths in length and MoM discretization of VIE with 805,306,368 unknowns.
Fast Electromagnetic Analysis of Multiscale Structures Using MultiAIM with an Improved Projection Scheme
ABSTRACT. Efficient boundary element electromagnetic analysis of advanced packages and interposers requires fast evaluation of dense operators. Fast Fourier transform (FFT)-based methods split these operators into near and far regions. In the far region, sources defined on mesh basis functions are projected onto a uniform auxiliary grid and propagated by FFT. Conventional mesh-to-grid projection represents each element using a compact stencil and a low-order interpolation polynomial, which may require a larger near region and more direct integration to maintain accuracy. We propose an improved projection technique for the solution of the augmented electric field integral equation (AEFIE) on multiscale structures. The method first projects sources defined on mesh basis functions to triangular quadrature nodes and then projects the node sources onto the uniform grid using local tensor-product Lagrange interpolation. The results show that the proposed method preserves the accuracy of the S-parameters while using a smaller near region, reducing the simulation time from 42.1 to 16.8 minutes for a frequency sweep on a bus from a commercial layout.
Component-Based Model Order Reduction of Thermal-Mechanical Analysis for Chiplet Design
ABSTRACT. Chiplet-based semiconductor architectures enable flexible system integration. Accurate evaluation of coupled thermal and mechanical behavior using the finite element method is essential because the thermal and mechanical behaviors depend on chiplet placement. However, the finite element method is computationally expensive, limiting its use in design optimization. This paper proposes a reduced-order modeling method that uses eigenvalue analysis to extract the dominant interface characteristic loads on the chip-substrate interface and incorporates them as external inputs into a moment-matching framework. Numerical results for a thermal mechanical chiplet model comfirm that this method accurately predicts thermal and mechanical responses with reduced computational cost, enabling rapid chiplet layout evaluation.
Fast Transient Electrothermal Co-Simulation for Thermal-Integrity Analysis of Power-Gated 2.5D/3D Systems
ABSTRACT. Transient thermal integrity is a growing concern in power-gated 2.5D/3D heterogeneous systems, where chiplet wake-up, rail recharge, and concurrent die activity can produce short-duration temperature violations that are missed by steady-state analysis. A fast transient electrothermal co-simulation framework is proposed that couples S-parameter-derived interconnect heating to a 3D implicit finite-volume conduction solver with anisotropic equivalent thermal conductivity. By factorizing the constant thermal operator once, each transient time step is reduced to a back-substitution, enabling rapid evaluation of many power-management scenarios. The framework is validated against Ansys Icepak across steady-state, heat-up, inrush, realistic module, and wake-schedule regimes, achieving per-die errors between <0.01 and ≤2.4 °C while running approximately 100× faster. Applied to a realistic 1-GPU/6-HBM 2.5D module at an H100 stress corner, the proposed methodology demonstrates that an energy-greedy retention policy overheats heavily loaded HBM stacks beyond the 95 °C limit, whereas a thermal-feasibility-screened policy eliminates violations with modest leakage overhead. These results establish the transient-aware thermal screening as a key requirement for reliable power management in advanced heterogeneous packages.
Analysis on creep strain and fatigue resistance of Ag sintered bonding layers in SiC chip systems using Ag sintering chip-attachment
ABSTRACT. This work clarifies the cumulative (equivalent) creep strain and the crack region for Ag sintered bonding layer under thermal cycling test (TCT) by 3D multi-physics solvers for SiC power device chip systems using direct Ag sintering chip-attachment on Cu plate. We analyze the cumulative creep strain for Ag sintered layer (Ag SL) using Norton's law with the constants, which are determined by comparing the FEM simulation results to results of stress relaxation experiments. The coefficient and exponent of the Coffin- Manson law are determined by comparing the simulation results to SAM (Scanning Acoustic Microscope) images. We also analyze the crack regions under TCT using the Coffin-Manson law. For the Ag SL with BLT of 50 μm the simulated crack regions by the Coffin-Manson law well agreed with the SAM results at 100 and 200 cycles of TCT, which were used to determine the coefficient and exponent. It was found that simulated crack regions also well agrees with SAM results at 50 and 150 cycles for the BLT of 50 μm, and SAM results for the BLT of 34.5 μm. These results clarify the validity of the determined coefficient and exponent for the Coffin–Manson law. This paper demonstrates a valuable method with the Coffin-Manson law for certifying the fatigue resistance of Ag sintering chip-attachment to Cu plate.
Systematic Synthesis of Ultra-Compact On-Chip E-Band 360° Phase Shifter
ABSTRACT. This paper presents a systematic synthesis approach for an ultra-compact on-chip E-band 360° phase shifter. The design is based on cascaded bridged-T coil (BTC) cells with capacitive tuning. A semi-global optimization strategy is used to determine the BTC component values that synthesize a broadband, 360° phase-shift response. The resulting five-cell design provides eight phase states with 45° resolution across the E band (60–90 GHz). Full-wave EM simulation of a pre-layout, passive-level EM model in a Tower Semiconductor 0.18 um SiGe BiCMOS stack-up shows an RMS phase error below 0.39° and a group delay variation within 2.3 ps across all states. The total footprint achieves an ultra-compact size of 0.047 mm2.
Improved Signal Integrity Modeling for Quantum Flex Circuits via Low-Temperature Dk/Df Extraction
ABSTRACT. The dielectric constant and dissipation factor of flex circuits at cryogenic temperatures are extracted using a differential transmission line methodology. The results are significantly different than room temperature values, leading to improved modeling and simulation.
Rooftop SSPP Interconnect with Filtering and Crosstalk Suppression at Cryogenic State (77 K)
ABSTRACT. We report the first cryogenic characterization of a multilayer
rooftop spoof surface plasmon polariton (SSPP) waveguide at
77~K under liquid nitrogen immersion. At 7~GHz, the measured
through-transmission S21 exceeds the far-end crosstalk S41 by
15.01~dB at 77~K, up from 6.92~dB at 300~K; whereas a microstripline of identical footprint achieves only 1.63 dB and 4.17~dB crosstalk noise margin
at 300~K and 77~K. A validated full-wave model projects
that a 7~Gbps rectangular pulse propagates undistorted while
the far-end crosstalk noise peak drops from $\pm$150~mV on the
microstripline to $\pm$75~mV on the SSPP. The second and third
harmonics of a nonlinear source are suppressed by 28.8 and
25.3~dB. These results position the rooftop SSPP as a
candidate for dense, unshielded mixed-signal routing with built-in filtering on
cryogenic boards and backplanes.
Harvesting Waste Heat for Autonomous Reconfigurability in VO2-Based spSIW Interconnect
ABSTRACT. This study extends a thermally reconfigurable interconnect [1] by demonstrating autonomous self-tuning. By harvesting heat dissipated from adjacent chips, the spSIW interconnect dynamically transitions between digital baseband and sub-THz
broadband modes without external control, achieving switching times of 0.8 seconds.