ABSTRACT. With the rapid growth of artificial intelligence, high-performance computing, and data-centric applications, future electronic systems must deliver significantly higher levels of bandwidth and performance. A key enabler of this scaling is advanced system-in-package integration, where multiple dies and chiplets are interconnected through increasingly dense and high-speed interconnect architectures. This tutorial reviews recent developments in advanced electronic packaging technologies for high-speed electrical and optical interconnects. Topics include 2D, 2.5D, and 3D integration architectures, signal integrity challenges, and modeling and characterization methodologies. The tutorial will also summarize current die-to-die and chiplet interface standardization efforts and discuss future scaling trends and challenges for heterogeneous integration. The tutorial is intended for engineers, researchers, and students seeking an overview of the technologies, methodologies, and standards shaping the next generation of chiplet-based systems.

ABSTRACT. The continuing growth of bandwidth in switches, processors, and computing accelerators is making the power and signal-integrity costs of long electrical interfaces increasingly difficult to sustain. Co-packaged optics addresses this electrical I/O bottleneck by placing photonic optical engines within the same package as the electronic ASIC, thereby reducing electrical reach and enabling high-bandwidth optical connectivity. This tutorial examines co-packaged optics primarily from the perspective of the integrated photonic technologies required to realize and scale these systems. We will first introduce the architecture of a co-packaged optical engine and its principal components, including waveguides, splitters, wavelength filters, modulators, photodetectors, light sources, and optical couplers. Particular attention will be given to two closely related challenges: operation in the high-temperature environment surrounding advanced electronic ASICs and the scalable delivery of optical power and signals into and out of the package. We will compare on-chip, heterogeneously integrated, and external light-source architectures; active thermal stabilization and athermal photonic designs; and fiber-coupling approaches including edge and grating couplers, elephant couplers, three-dimensional reflectors, freeform couplers, and package-level optical waveguides. Finally, we will examine bandwidth-density scaling through wavelength- and mode-division multiplexing, multicore fibers, multilayer routing, and three-dimensional photonic integration. The tutorial will conclude by considering how the technologies developed for optical I/O could enable a broader class of co-packaged photonic systems for sensing, LiDAR, computing, memory, and hardware security.

ABSTRACT. The rapid growth of artificial intelligence (AI) and high-performance computing (HPC) is accelerating the adoption of advanced 2.5D/3D packaging technologies based on chiplets, high-bandwidth memory (HBM), silicon and organic interposers, redistribution layers, and increasingly complex heterogeneous integration. As package size, interconnect density, data rate, memory bandwidth, and power consumption continue to scale, signal integrity (SI) and power integrity (PI) analysis is becoming significantly more challenging. Accurate analysis must address dense three-dimensional interconnect structures, large numbers of coupled nets, multi-scale geometries spanning die, interposer, package, and board, as well as increasingly large and complex power distribution networks (PDNs).

This tutorial reviews the key SI/PI challenges associated with next-generation 2.5D/3D advanced packaging and the computational technologies required to address them. For signal integrity, topics include full-wave electromagnetic modeling of dense die-to-die and HBM interconnects, crosstalk, bump-via-trace transitions, multi-scale die/interposer/package co-simulation, and EM-circuit co-simulation for system-level channel analysis. For power integrity, the tutorial discusses large-scale DC and AC PDN analysis, package-die power delivery, decoupling strategies, impedance and resonance analysis, and the need to analyze increasingly large PDNs as an integrated system rather than as disconnected substructures.

The tutorial will also examine advances in computational electromagnetics that enable high-capacity and scalable SI/PI analysis, including specialized meshing, full-wave solvers, parallel computing, and techniques for handling very large multi-scale structures. Practical examples and case studies based on contemporary advanced packaging technologies—including CoWoS-class integration, HBM, chiplet die-to-die interfaces, and large heterogeneous packages—will illustrate both the challenges and the analysis methodologies.

ABSTRACT. The rapid growth of foundation models has driven widespread adoption of AI, while the computational and energy resources required to support these systems continue to grow rapidly. At the same time, conventional deep learning faces fundamental algorithmic challenges including large data requirements, limited adaptability to streaming data, adversarial vulnerability, and limited interpretability. Brain-inspired neuromorphic computing offers an alternative approach by rethinking AI across algorithms, devices, circuits, and systems.

This tutorial will provide a systems-level introduction to emerging approaches in NeuroAI and neuromorphic computing, highlighting the connections between computational neuroscience, dynamical systems, and hardware architectures. From the algorithmic perspective, I will introduce approaches that view neuromorphic architectures as continuously evolving dynamical systems and discuss how these perspectives lead to local and online learning mechanisms for complex temporal and sequence-learning tasks. From the hardware perspective, I will discuss how emerging devices, including ferroelectric technologies, can provide computational primitives that more closely match brain-inspired and AI workloads, enabling energy-efficient compute-in-memory architectures with in-situ learning. I will then connect these algorithmic and device-level approaches through hardware–software co-design strategies for building robust, variation-aware, and self-healing neuromorphic systems.

Throughout the tutorial, recent results from my group will serve as concrete examples to illustrate the underlying principles and their implementation across the algorithm–device–circuit–system hierarchy. The tutorial will conclude with a discussion of opportunities for expanding neuromorphic computing beyond conventional neuron-and-synapse abstractions by incorporating richer computational principles from neuroscience and dynamical systems.

ABSTRACT. This talk provides an overview over the utilization of Gaussian process regression (GPR) for the data-efficient uncertainty quantification, yield analysis, and optimization of electronic systems. GPR, also known as Kriging, is a nonparametric method belonging to the class of kernel machine learning regressions. As such, it does not assume a predetermined functional form, but it rather constructs the model from data. This makes it more flexible and suitable for building surrogate models of computationally expensive systems characterized by a large number of independent input design parameters. In particular, the tutorial will discuss the prediction confidence and the calculation of statistical moments, explore active learning strategies for the iterative acquisition of optimal training datasets, and introduce a novel hybrid technique that is able to further reduce the data demand.

ABSTRACT. Three-dimensional integration is disrupting the semiconductor industry, enabling the design of integrated circuits (ICs) with unprecedented performance. These architectures play a critical role in the development of high-performance computing systems, and are a key enabler for artificial intelligence applications. The design of 3D ICs poses significant challenges, particularly in the area of electromagnetic modeling. The interconnect network that delivers signals and power across the IC is subject to electromagnetic phenomena, such as interference and resonances, that can undermine IC performance and reliability. Their accurate prediction is critical for a successful design, but requires the ability to solve Maxwell's equations for an extremely complex and multiscale geometry (thousands of objects, millions of unknowns) over a broad frequency range (DC to 80 GHz). This is a fascinating challenge that pushes the limits of computational electromagnetism, and is immensely relevant to the design of emerging technologies such as 3D ICs, metasurface antennas, metamaterials and quantum computing devices.
This tutorial will first review the state of the art in integral equation methods for Maxwell’s equations. A comprehensive overview of their mathematical foundations will be presented, including meshing, choice of basis functions, modeling of layered substrates, acceleration and parallelization. Finally, we will discuss research developments and their application to the electromagnetic modeling of 3D ICs.