EMC COMPO 2015: THE 10TH INTERNATIONAL WORKSHOP ON THE ELECTROMAGNETIC COMPATIBILITY OF INTEGRATED CIRCUITS
PROGRAM

Days: Tuesday, November 10th Wednesday, November 11th Thursday, November 12th Friday, November 13th

Tuesday, November 10th

View this program: with abstractssession overviewtalk overview

09:30-10:30 Session 1

Welcome and Keynote I

Location: Presidents Suite (Presentation room)
09:30
Welcome to EMC Compo 2015 ( abstract )
09:45
Maxwell’s Legacy – The Heart and Soul of the EMC Discipline ( abstract )
10:30-11:00Coffee Break
11:00-12:30 Session 2

Design for EMC I

Location: Presidents Suite (Presentation room)
11:00
Emission Reduction in Class-D Audio Amplifiers by Optimizing Spread Spectrum Modulation ( abstract )
11:22
DC/DC Converter Dead-Time Variation Analysis and Far-Field Radiation Estimation ( abstract )
11:44
A Highly-Digitized Automotive CAN Transceiver in 0.14μm High-Voltage SOI CMOS ( abstract )
12:06
EMC and Switching Loss Improvement for Fast Switching Power Stages by di/dt, dv/dt Optimization with 10ns Variable Current Source Gate Driver ( abstract )
12:30-13:30Lunch Break
13:30-15:00 Session 3

Measurement techniques I

Location: Presidents Suite (Presentation room)
13:30
Direct power injection on functional and non-functional signals of SPI EEPROM memories ( abstract )
13:52
Electromagnetic Coupling Circuit Model of a Magnetic Near-Field Probe to a Microstrip Line ( abstract )
14:14
Bandgap Failure Study Due To Parasitic Bipolar Substrate Coupling In Smart Power Mixed ICs ( abstract )
14:36
Fundamental Study on Randomized Processing in Cryptographic IC Using Variable Clock Against Correlation Power Analysis ( abstract )
15:00-15:30Coffee Break
15:30-17:30 Session 4

Design for EMC II (poster)

Location: Presidents Suite (Poster area)
15:30
An EMI robust LIN Driver with low Electromagnetic Emission ( abstract )
15:30
Analytical Aproach to study Electromagnetic Emission EME Contributors on DC/DC applications Introducing of multiphase Buck converters in automotive analog designs to reduce EME ( abstract )
15:30
EMI Improved Chopped Operational Amplifier ( abstract )
15:30
Methodology for interference analysis during early design stages of high-performance mixed-signal ICs ( abstract )
15:30
On-Chip Watchdog to Monitor RTOS Activity in MPSoC Exposed to Noisy Environment ( abstract )
15:30
Resonance Analysis for EMC Improvement in Integrated Circuits ( abstract )
15:30
Improving the Shielding Effectiveness of a Board-Level Shield by Bonding it with the Waveguide-Below-Cutoff Principle ( abstract )
15:30
Dynamic Multi-Parameter Response Model for SEED Analysis ( abstract )
15:30
Examination of different adder structures concerning di/dt in a 180nm technology ( abstract )
15:30
Role of IC Substrate and ESD Protections in Noise Propagation: Design and Modelling of Dedicated Test Chip in 40 nm Technology ( abstract )
15:30
Analysis of EMI Reduction Methods of DC-DC Buck Converter ( abstract )
15:30
Arbitrary Shape Multilayer Interconnects EMC Modelling and Optimization ( abstract )
Wednesday, November 11th

View this program: with abstractssession overviewtalk overview

09:30-10:30 Session 5

Keynote II

Location: Presidents Suite (Presentation room)
09:30
The Evolution of Commercial EMC Standards ( abstract )
10:30-11:00Coffee Break
11:00-12:30 Session 6

Immunity I

Location: Presidents Suite (Presentation room)
11:00
Preliminary Study of Automatic Control Gain Loop Subjected to Pulse-modulated Radiofrequency Interference ( abstract )
11:22
Susceptibility to EMI of High Side Current Sensors based on Chopper OpAmps ( abstract )
11:44
RF Immunity Investigations of Linear DC Current Regulators ( abstract )
12:06
Functional analysis of an integrated communication interface during ESD ( abstract )
12:30-13:30Lunch Break
13:30-15:00 Session CST1

CST Workshop

Location: 1925 suite
13:30
Signal/Power Integrity and EMC simulations of chip/package/board (Part I) ( abstract )
13:30-15:00 Session 7

Immunity II

Location: Presidents Suite (Presentation room)
13:30
Near-Field Injection on a Safe System Basis Chip at Silicon Level ( abstract )
13:52
Experimental Validation of the Generalized Accurate Modelling Method for System-Level Bulk Current Injection Setups up to 1 GHz ( abstract )
14:14
Relation between Internal Terminal Voltage and Immunity Behavior of LDO Regulator Circuits ( abstract )
14:36
Radiated Electromagnetic Immunity Analysis of VCO Using IC Stripline Method ( abstract )
15:00-15:30Coffee Break
15:30-17:00 Session D1

Demonstrations

Location: Presidents Suite (Presentation room)
15:30
EMC modeling of Integrated Circuits using IC-EMC ( abstract )
15:30-17:00 Session CST2

CST Workshop

Location: 1925 suite
15:30
Signal/Power Integrity and EMC simulations of chip/package/board (Part II) ( abstract )
15:30-17:30 Session 8

EMC I (poster)

Location: Presidents Suite (Poster area)
15:30
Analysis of On-Chip Digital Noise Coupling Path for Wireless Communication IC Test Chip ( abstract )
15:30
TSV-based Current Probing Structure using Magnetic Coupling in 2.5D and 3D IC ( abstract )
15:30
Case Study on the Differences between EMI Resilience of Analog ICs against Continuous Wave, Modulated and Transient Disturbances ( abstract )
15:30
Simulation model based on JEDEC JS-001-2014 for circuit simulation of HBM ESD pulses on IC level ( abstract )
15:30
Characterization of the Immunity of Integrated Circuits (ICs) at Wafer Level ( abstract )
15:30
Thermal-electromagnetic susceptibility behaviors of PWM patterns used in control electronic circuit ( abstract )
15:30
DPI set-up for ICs with differential inputs ( abstract )
15:30
Computational Electromagnetics in Shielding Analysis of System in Package ( abstract )
15:30
Time-domain EMI Measurement Methodology ( abstract )
15:30
RF Interference Evaluation of Flexible Flat Cables for High-Speed Data Transmission in Mobile Devices ( abstract )
15:30
Enhancement of the Spatial Resolution of Near-Field Immunity Maps ( abstract )
15:30
Ageing effects on power RF LDMOS reliability using the Transmission Line Matrix method ( abstract )
15:30
ESD test at component level ( abstract )
19:00-22:00 Session

Visits to  James Clerk Maxwell's house

Thursday, November 12th

View this program: with abstractssession overviewtalk overview

09:30-10:30 Session 9

Keynote III

Location: Presidents Suite (Presentation room)
09:30
Future needs in EMC of ICs - Are you hearing the voice of industry ? ( abstract )
10:30-11:00Coffee Break
11:00-12:30 Session 10

Modelling I

Location: Presidents Suite (Presentation room)
11:00
Radiation Characteristics of Small Loop Antenna above Perforated Finite Image Plane ( abstract )
11:22
Simulation of Radiated Emission during the Design Phase based on Scattering Parameter Measurement ( abstract )
11:44
Large domain validity of MOSFET Microwave Rectification Response ( abstract )
12:06
EMC performance analysis of a Processor/Memory System using PCB and Package-On-Package ( abstract )
12:30-13:30Lunch Break
13:30-15:00 Session ANSYS1

ANSYS Workshop (Part I)

13:30
Assessment and improvement of the EMC behaviour for Printed Circuit Boards ( abstract )
13:30-15:00 Session 11

Modelling II

Location: Presidents Suite (Presentation room)
13:30
Smart Power IC Macromodeling for DPI Analysis ( abstract )
13:52
Shielding Structures for Through Silicon Via (TSV) to Active Circuit Noise Coupling in 3D IC ( abstract )
14:14
Developing a Universal Exchange Format for Integrated Circuit Emission Model – Conducted Emissions ( abstract )
14:36
Building Interchangeable Black-Box Models of Integrated Circuits for EMC Simulations ( abstract )
15:00-15:30Coffee Break
15:30-17:00 Session W1

EMC behaviour of COTS components after ageing (Workshop)

Location: Presidents Suite (Presentation room)
15:30
A methodologic project to characterize and model EMC behavior of COTS components after ageing ( abstract )
16:00
Analysis and Modelling of Passive device degradation for a long-term electromagnetic emission study of a DC-DC converter ( abstract )
16:30
ICIM-CI model of Op. Amp taking into account environment effect for robustness concern ( abstract )
15:30-17:00 Session ANSYS2

ANSYS Workshop (Part II)

15:30
Power, Noise and Reliability: Analysis and Optimisation of High Performance Chip Designs using ANSYS Apache ( abstract )
19:00-23:59 Session : Gala Dinner

EMC Compo Gala Dinner at Ghillie Dhu including presentation of best paper awards.

Location: Ghillie Dhu
Friday, November 13th

View this program: with abstractssession overviewtalk overview

09:00-10:30 Session W2

System decoupling capacitor selection and placement to minimize radiation and immunity issues Part I (Workshop)

Location: Presidents Suite (Presentation room)
09:00
Introduction ( abstract )
09:15
The power delivery system ( abstract )
10:00
Simple test board measurements and results ( abstract )
10:30-11:00Coffee Break
11:00-12:30 Session W3

System decoupling capacitor selection and placement to minimize radiation and immunity issues Part II (Workshop)

Location: Presidents Suite (Presentation room)
11:00
ST Microcontroller pcb and measurement results ( abstract )
11:45
Demonstration of optimization of the power delivery system on a large design ( abstract )
12:15
Summary and further discussion ( abstract )