DSD2022: EUROMICRO CONFERENCE ON DIGITAL SYSTEMS DESIGN 2022
PROGRAM

Days: Wednesday, August 31st Thursday, September 1st Friday, September 2nd

Wednesday, August 31st

View this program: with abstractssession overviewtalk overview

09:00-10:00 Session 2: [Keynote] Dr. Arne Hamann

Title: Designing Reliable Distributed Systems

Abstract: Software is disrupting one industry after another. Currently, the automotive industry is under pressure to innovate in the area of software. New, innovative approaches to vehicles and their HW/SW architectures are required and are currently subsumed under the term “SW-defined vehicle”. However, this trend does not stop at the vehicle boundaries, but also includes communication with off-board edge and cloud services. Thinking it through further, this leads to a breakthrough technology we call “Reliable Distributed Systems”, which enables the operation of vehicles where time and safety-critical sensing and computing tasks are no longer tied to the vehicle, but can be shifted into an edge-cloud continuum. This allows a variety of novel applications and functional improvements but also has a tremendous impact on automotive HW/SW architectures and the value chain. Reliable distributed systems are not limited to automotive use cases. The ubiquitous and reliable availability of distributed computing and sensing in real-time enable novel applications and system architectures in a variety of domains: from industrial automation over building automation to consumer robotics. However, designing reliable distributed systems raises several issues and poses new challenges for edge and cloud computing stacks as well as electronic design automation.

Location: Auditorium
10:00-10:30Coffee Break
10:30-12:00 Session 3A: HW-SW Reconfigurability
Location: Room 1 - DSD
10:30
Towards Hardware Support for FPGA Resource Elasticity (abstract)
10:55
Analysis of Graph Processing in Reconfigurable Devices for Edge Computing Applications (abstract)
PRESENTER: Kaan Olgu
11:20
A Supervisory Control Approach for Scheduling Real-time Periodic Tasks on Dynamically Reconfigurable Platforms (abstract)
11:37
moreMCU: A Runtime-reconfigurable RISC-V Platform for Sustainable Embedded Systems (abstract)
PRESENTER: Tobias Scheipel
10:30-12:00 Session 3B: AAMTM-1
Location: Auditorium
10:30
PipeEdge: Pipeline Parallelism for Large-Scale Model Inference on Heterogeneous Edge Devices (abstract)
PRESENTER: Connor Imes
10:55
An FPGA based Tiled Systolic Array Generator to Accelerate CNNs (abstract)
11:12
CPU-GPU Layer-Switched Low Latency CNN Inference (abstract)
11:29
Co-Optimizing Sensing and Deep Machine Learning in Automotive Cyber-Physical Systems (abstract)
11:46
Partial Evaluation in Junction Trees (abstract)
10:30-12:00 Session 3C: AHSA-1
Location: Room 2 - DSD
10:30
Variable-Length Instruction Set: Feature or Bug? (abstract)
10:55
A CFI Verification System based on the RISC-V Instruction Trace Encoder (abstract)
11:12
Combination of ROP Defense Mechanisms for Better Safety and Security in Embedded Systems (abstract)
11:29
Towards Fine-grained Side-Channel Instruction Disassembly on a System-on-Chip (abstract)
11:46
Side-Channel Analysis of Saber KEM Using Amplitude-Modulated EM Emanations (abstract)
PRESENTER: Ruize Wang
10:30-12:00 Session 3D: ASHWPA
Location: Room 3 - DSD
10:30
In vitro Testbed Platform for Evaluating Small Volume Contrast Agents via Magnetic Resonance Imaging (abstract)
10:55
A Smart Floor Device of an Exergame Platform for Elderly Fall Prevention (abstract)
11:20
GPU Based Implementation for the Pre-Processing of Radar-Based Human Activity Recognition (abstract)
11:37
On the Validation of Multi-Level Personalised Health Condition Model (abstract)
11:54
CELR: Cloud Enhanced Local Reconstruction from Low-dose Sparse Scanning Electron Microscopy Images (abstract)
12:00-13:30Lunch Break
13:30-14:30 Session 4: [Keynote] Dr. Heiko Koziolek

Title: Software Architecture Challenges in Industrial Process Automation: from Code Generation to Cloud-native Service Orchestration

Abstract: Large, distributed software systems with integrated embedded systems support production plant operators in controlling and supervising complex industrial processes, such as power generation, chemical refinement, or paper production. With several million lines of code these Operational Technology (OT) systems grow continuously more complex, while customers increasingly expect a higher degree of automation, easier customization, and faster time-to-market for new features. This has led to an ongoing adoption of modern Information Technology (IT) reference software architectures and approaches, e.g., middlewares, model-based development, and microservices. This talk presents illustrative examples of this trend from technology transfer projects at ABB Research, highlighting open issues and research challenges. These include information modeling in M2M middlewares for plug-and-play functionality, code generation from engineering requirements to speed up customization, as well as online updates of containerized control software on virtualized infrastructures.

Location: Auditorium
14:30-16:00 Session 5A: Approximate Computing
Location: Room 1 - DSD
14:30
EARL: An Efficient Approximate HaRdware Framework for AcceLerating Fault Tree Analysis (abstract)
14:55
ESAS: Exponent Series based Approximate Square Root Design (abstract)
15:20
An Approximate Carry Disregard Multiplier with Improved Mean Relative Error Distance and Probability of Correctness (abstract)
15:37
A Majority-based Approximate Adder for FPGAs (abstract)
14:30-16:00 Session 5B: AAMTM-2
Location: Auditorium
14:30
Breaking (and Fixing) Channel-based Cryptographic Key Generation: A Machine Learning Approach (abstract)
14:55
Hardware-Software Codesign of a CNN Accelerator (abstract)
15:12
Hardware Accelerator and Neural Network Co-Optimization for Ultra-Low-Power Audio Processing Device (abstract)
15:29
SNAP: Selective NTV Heterogeneous Architectures for Power-Efficient Edge Computing (abstract)
15:46
MVSTT: A Multi-Value Computation-in-Memory based on Spin-Transfer Torque Memories (abstract)
14:30-16:00 Session 5C: AHSA-2
Location: Room 2 - DSD
14:30
Efficient Modular Polynomial Multiplier for NTT Accelerator of Crystals-Kyber (abstract)
14:55
Open Source Hardware Design and Hardware Reverse Engineering: A Security Analysis (abstract)
15:12
Implementation of the Rainbow signature scheme on SoC FPGA (abstract)
15:29
Be My Guess: Guessing Entropy vs. Success Rate for Evaluating Side-Channel Attacks of Secure Chips (abstract)
15:46
Electromagnetic Leakage Assessment of a Proven Higher-Order Masking of AES S-Box (abstract)
14:30-16:00 Session 5D: DTFT
Location: Room 3 - DSD
14:30
Towards Resilient QDI Pipeline Implementations (abstract)
PRESENTER: Zaheer Tabassam
14:55
Verifying Liveness and Real-Time of OS-Based Embedded Software (abstract)
15:12
IMMizer: An Innovative Cost-Effective Method for Minimizing Assertion Sets (abstract)
15:29
Nonlinear Compression Block Codes Search Strategy (abstract)
15:46
Verification of Calculations of Non-Homogeneous Markov Chains Using Monte Carlo Simulation (abstract)
16:00-16:30Coffee Break
Thursday, September 1st

View this program: with abstractssession overviewtalk overview

09:00-10:00 Session 7: [Keynote] Prof. Helena Holmström Olsson

Title: From Traditional to Digital: How software, data and AI are transforming the embedded systems industry

Abstract: With digitalization and with technologies such as software, data, and artificial intelligence, companies in the embedded systems domain are experiencing a rapid transformation of their conventional businesses. While the physical products and associated product sales provide the core revenue, these are increasingly being complemented with service offerings, new data-driven services, and digital products that allow for continuous value creation and delivery to customers. This talk explores the difference between what constitutes a traditional and a digital company and details the typical evolution path embedded systems companies take when transitioning towards becoming digital companies. The talk focuses on the changes associated with business models, ways-of-working and ecosystem engagements and provides concrete examples based on action-oriented research conducted in close collaboration with companies in the embedded systems domain.

Location: Auditorium
10:00-10:30Coffee Break
10:00-10:30 Session 8: Poster Session
Location: HALL
Evaluating Cryptographic Extensions On A RISC-V Simulation Environment (abstract)
Towards a Real-Time Smart Prognostics and Health Management (PHM) of Safety Critical Embedded Systems (abstract)
On the Characterization of Jitter in Ring Oscillators using Allan variance for True Random Number Generator Applications (abstract)
Energy-Efficient Radix-4 Belief Propagation Polar Code Decoding Using an Efficient Sign-Magnitude Adder and Clock Gating (abstract)
A holistic hardware-software approach for fault-aware embedded systems (abstract)
Is the Whole lesser than its Parts? Breaking an Aggregation based Privacy aware Metering Algorithm (abstract)
FPGA implementation of BIKE for quantum-resistant TLS (abstract)
Adaptive Exploration Based Routing for Spatial Isolation in Mixed Criticality Systems (abstract)
A Hybrid Scheduling Mechanism for Multi-programming in Mixed-Criticality Systems (abstract)
10:30-12:00 Session 9A: RISC-V Architecture
Location: Room 1 - DSD
10:30
Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI (abstract)
10:55
Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the Best? (abstract)
11:20
A Resilient System Design to Boot a RISC-V MPSoC (abstract)
11:37
RISC-V Core with Approximate Multiplier for Error-Tolerant Applications (abstract)
10:30-12:00 Session 9B: AAMTM-3
Location: Auditorium
10:30
TextBack: Watermarking Text Classifiers using Backdooring (abstract)
10:47
DNAsim: Evaluation Framework for Digital Neuromorphic Architectures (abstract)
11:04
Quantization: how far should we go? (abstract)
11:21
CaW-NAS: Compression Aware Neural Architecture Search (abstract)
11:38
Demystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU Tandem (abstract)
PRESENTER: Paul Delestrac
10:30-12:00 Session 9C: HIAAA-1
Location: Room 2 - DSD
10:30
Development of a Hyperspectral Colposcope for Early Detection and Assessment of Cervical Dysplasia (abstract)
10:55
Glioblastoma Classification in Hyperspectral Images by Nonlinear Unmixing (abstract)
11:20
Evaluation of artificial neural networks for the detection of esophagus tumor cells in microscopic hyperspectral images (abstract)
11:37
Hyperparameter Optimization for Brain Tumor Classification with Hyperspectral Images (abstract)
10:30-12:00 Session 9D: EPDSD-1
Location: Room 3 - DSD
10:30
RED-SEA: Network Solution for Exascale Architectures (abstract)
10:55
Sense and Control of Oscillating MEMS Mirrors (abstract)
11:20
Sentient Spaces: Intelligent Totem Use Case in the ECSEL FRACTAL Project (abstract)
PRESENTER: Luigi Pomante
11:37
Abeto framework: a Solution for Heterogeneous IP Management (abstract)
12:00-13:30Lunch Break
13:30-14:30 Session 10: [Keynote] Prof. Martin Schoeberl

Title: Open-Source Research on Time-predictable Computer Architecture

Abstract: Real-time systems need time-predictable computers to be able to guarantee that computation can be performed within a given deadline.For worst-case execution time analysis we need detailed knowledgeof the processor and memory architecture. Providing the design of a processor in open-source enables the development of worst-cease execution time analysis tools without the unsafe reverse engineering of processor architectures. Open-source software is currently the basis of many Internet services, e.g., an Apache web server running on top of Linux with a web application written in Java. Furthermore, for most programming languages in use today, there are a open-source compilers available. However, hardware designs are seldom published in open-source. Furthermore, many artifacts developed in research, especially hardware designs, are not published in open-source. The two main arguments formulated against publishing research in open source are:(1) “When I publish my source before the paper gets accepted, someone may steal my ideas” and(2) “My code is not pretty enough to publish it, I first need to clean it up (which seldom happens)”. In this paper and in the presentation I will give counterarguments for those two issues. I will present the successful T-CREST/Patmos research project, where almost all artifacts have been developed in open-source from day one. Furthermore, I will present experiences using the Google/Skywater open-sourcetool flow to produce a Patmos chip with 12 students within a one semester course.

Location: Auditorium
14:30-16:00 Session 11A: Modeling and Simulation
Location: Room 1 - DSD
14:30
Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems: A RISC-V Case-Study (abstract)
14:55
Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets (abstract)
15:12
Placement of Chains of Real-Time Tasks on Heterogeneous Platforms under EDF Scheduling (abstract)
15:29
Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures (abstract)
15:46
X-on-X: Distributed Parallel Virtual Platforms for Heterogeneous Systems (abstract)
14:30-16:00 Session 11B: AAMTM-4
Location: Auditorium
14:30
ARTS: An adaptive regularization training schedule for activation sparsity exploration (abstract)
14:55
Co-Optimization of DNN and Hardware Configurations on Edge GPUs (abstract)
15:20
Hardware Acceleration of Deep Neural Networks for Autonomous Driving on FPGA-based SoC (abstract)
15:37
RRAM-based Neuromorphic Computing: Data Representation, Architecture, Logic, and Programming (abstract)
14:30-16:00 Session 11C: HIAAA-2
Location: Room 2 - DSD
14:30
Estimation of deoxygenated and oxygenated hemoglobin by multispectral blind linear unmixing (abstract)
14:55
Attention-based Skin Cancer Classification Through Hyperspectral Imaging (abstract)
15:20
Reflectance Calibration with Normalization Correction in Hyperspectral Imaging (abstract)
15:37
Spectral Super-Resolution for Hyperspectral Histological Image Synthesis with Deep Learning (abstract)
14:30-16:00 Session 11D: EPDSD-2
Location: Room 3 - DSD
14:30
Network on Privacy-Aware Audio-and Video-Based Applications for Active and Assisted Living: GoodBrother Project (abstract)
14:55
SmartDelta: Automated Quality Assurance and Optimization in Incremental Industrial Software Systems Development (abstract)
15:20
COMP4DRONES: Key Enabling Technologies for Drones to enhance Mobility and Logistics Operations (abstract)
16:00-16:30Coffee Break
16:00-16:30 Session 12: Poster Session
Location: HALL
Skeptical Dynamic Dependability Management for Automated Systems (abstract)
FP-SLIC: A Fully-Pipelined FPGA Implementation of Superpixel Image Segmentation (abstract)
Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm (abstract)
Monitoring Framework to Support Mixed-Criticality Applications on Multicore Platforms (abstract)
A Low-complexity FPGA TDC based on a DSP Delay Line and a Wave Union Launcher (abstract)
AxE: An Approximate–Exact Multi-Processor System-on-Chip Platform (abstract)
Towards Skin Cancer Self-Monitoring through an Optimized MobileNet with Coordinate Attention (abstract)
Hardware Support for Predictable Resource Sharing in Virtualized Heterogeneous Multicores (abstract)
Mobile Systems Secure State Management (abstract)
SecDec : Secure Decode Stage thanks to masking of instructions with the generated signals (abstract)
How are Industry 4.0 Reference Architectures Used in CPPS Development? (abstract)
Friday, September 2nd

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09:00-10:00 Session 13: [Keynote] Prof. Marisa Lopez-Vallejo

Title: Looking for the limits of electronics for autonomous microsystems

Abstract: Autonomous microsystems are microscale systems that do not need external power to operate and communicate for a given period of time. If we can build autonomous microsystems even with dimensions as small as the diameter of a human hair (< 100 μm) new use cases for sensing applications could be addressed. For example, microsensors could be embedded into fibers to produce smart clothing, new approaches to in-vitro and in-body sensing could be performed, etc. This keynote will address the challenges that electronic circuits must meet to be part of and support the design and integration of autonomous microsystems.

Location: Auditorium
10:00-10:30Coffee Break
10:30-12:00 Session 14A: Applications
Location: Room 1 - DSD
10:30
PositIV: A Configurable Posit Processor Architecture for Image and Video Processing (abstract)
10:55
High-Level Synthesis of Geant4 Particle Transport Application for FPGA (abstract)
PRESENTER: Ramakant Joshi
11:20
ImageSpec: Efficient High-Level Synthesis of Image Processing Applications (abstract)
11:37
A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection (abstract)
10:30-12:00 Session 14B: Artificial Intelligence Implementations
Location: Auditorium
10:30
Inference Time Reduction of DNNs on Embedded Devices: A Case Study (abstract)
10:55
PosAx-O: Exploring Operator-level Approximatons for Posit Arithmetic in Embedded AI/ML (abstract)
11:20
Evaluation of Early-exit Strategies in Low-cost FPGA-based Binarized Neural Networks (abstract)
11:37
A Clustering-Based Scoring Mechanism for Malicious Model Detection in Federated Learning (abstract)
10:30-12:00 Session 14C: FTET-1
Location: Room 2 - DSD
10:30
Polynomial Formal Verification of Approximate Adders (abstract)
10:55
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library (abstract)
11:12
Optimizing Lattice-based Post-Quantum Cryptography Codes for High-Level Synthesis (abstract)
11:29
Designing Approximate Arithmetic Circuits with Combined Error Constraints (abstract)
11:46
Technology Mapping for PAIG Optimised Polymorphic Circuits (abstract)
10:30-12:00 Session 14D: DCPS
Location: Room 3 - DSD
10:30
Real-Time Polling Task: Design and Analysis (abstract)
10:55
Design Space Exploration for Distributed Cyber-Physical Systems: State-of-the-art, Challenges, and Directions (abstract)
11:20
Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications (abstract)
12:00-13:30Lunch Break
13:30-15:00 Session 15A: HW Architectures
Location: Room 1 - DSD
13:30
Coherency Traffic Reduction in Manycore Systems (abstract)
13:55
Ballast: Implementation of a Large MP-SoC on 22nm ASIC Technology (abstract)
14:20
Investigating Novel 3D Modular Schemes for Large Array Topologies: Power Modeling and Prototype Feasibility. (abstract)
PRESENTER: Pakon Thuphairo
13:30-15:00 Session 15B: SPCPS
Location: Auditorium
13:30
A Framework for Evaluating Connected Vehicle Security against False Data Injection Attacks (abstract)
13:55
Hybrid Post-Quantum Enhanced TLS 1.3 on Embedded Devices (abstract)
14:20
Blind Data Adversarial Bit-flip Attack against Deep Neural Networks (abstract)
13:30-15:00 Session 15C: FTET-2
Location: Room 2 - DSD
13:30
MEDA Biochip based Single-Target Fluidic Mixture Preparation with Minimum Wastage (abstract)
13:55
Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles (abstract)
14:20
Generation of Verified Programs for In-Memory Computing (abstract)
14:37
SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology (abstract)
13:30-15:00 Session 15D: ITS
Location: Room 3 - DSD
13:30
POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications (abstract)
13:55
A resolution method in case of air congestion: rerouting and/or ground holding approach (abstract)
14:20
Optimizing UAV Location Awareness Telemetry for Low Power Wide Area Network (abstract)
15:00-15:30Coffee Break