TALK KEYWORD INDEX
This page contains an index consisting of author-provided keywords.
1 | |
130nm CMOS | |
5 | |
5G LNA | |
6 | |
6G | |
A | |
ADC | |
Advanced Encryption Standard (AES-128) | |
AI | |
AI Acceleration | |
AI processor | |
antenna-on-chip | |
APB | |
Application-specific ISA | |
Approximate Computing | |
Approximate Divider | |
Approximate Multiplier | |
Arbiters | |
artificial magnetic conducto | |
Artificial neural networks | |
ASIC acceleration | |
Asynchronous | |
asynchronous-logic masked AES accelerator | |
Autism | |
AXI | |
B | |
backdoors | |
Backplane interconnect | |
Barrett Reduction | |
Bi-Directional Amplifier | |
Bias | |
bias detection | |
Biomaterials | |
Bond wire based Inductor | |
Breathing Rate | |
Buck Converter | |
Bufferless router | |
Bundled-Data | |
C | |
Call Option Payoff Function | |
Carry-lookahead Adder | |
Channel-first dataflow | |
characterization | |
Chip Certification | |
Chip-to-chip communication | |
ChipWhisperer-Lite | |
CIM | |
CKKS | |
CMOS LNA | |
CMOS quantum computing | |
CMOS rectifier | |
CNN | |
CNN accelerator | |
Cold source | |
comparative analysis | |
Compute-in-memory | |
Compute-In-Place | |
Computer Architecture | |
Confidential inference | |
confidentiality | |
Connected component algorithm | |
continues development | |
continues integration | |
Continuous Conduction Mode | |
Control | |
convolution | |
Convolutional Neural Network | |
Correlation Power Analysis (CPA) | |
Correlation Power Attack | |
CPU | |
Critical Embedded Systems | |
cryogenic modeling | |
Cryptography | |
CUDA | |
Cyclic Logic Encryption | |
D | |
DAC | |
Data-Driven Pruning | |
dataflow analysis | |
datasets | |
DC-DC Power Converter | |
Decision trees | |
deep learning | |
Deflection rate | |
delta–sigma modulator (DSM) | |
Depthwise separable convolution | |
design optimization | |
design space exploration | |
Detection | |
Differential Power Analysis (DPA) | |
Digital demodulation | |
Digital Implementation Design Flow | |
Digital radar | |
Dynamic memory manager hardware | |
Dynamic Partial Reconfiguration | |
E | |
EDA | |
Edge AI | |
Edge computing | |
edge oxidation | |
eDRAM | |
Embedded instrument | |
Embedded systems | |
Emerging Technology | |
energy-efficiency | |
Envelop detection | |
Error-resistant architectures | |
Event-Based | |
Event-Driven Tasks | |
F | |
fabrication | |
failure | |
Fano factor | |
fault detection | |
Fault Injection | |
FeFET Design | |
FeRAM | |
FHE | |
Field Programmable Gate Arrays | |
FinFET | |
Flash ADC | |
flexible electronic devices | |
Floating-point numbers | |
Formal Methods | |
Formal Verification | |
FPGA | |
FPGA routing | |
FPGA Security | |
fractional-N frequency synthesizer | |
Fully Homomorphic Encryption | |
G | |
Gate compounding | |
genomics | |
Gigabit Radio | |
GPU | |
Graph Neural Network | |
Graphics Processing Units (GPUs) | |
H | |
hardware accelerator | |
hardware emulation | |
Hardware Security | |
Hardware Trojan | |
Heart Rate | |
High Throughput | |
Human Emotions | |
Hybrid memory | |
Hyperdimnesional Computing | |
I | |
IEEE Std. 1687 | |
Image processing | |
in-memory computing | |
In-package wireless communication | |
Industrial | |
Industrial Applications | |
information flow analysis | |
Information Processing Factory | |
Integrated Circuits | |
Intelligent Chip Explorer | |
interoperable PDK | |
IoT Applications | |
irradiation test | |
ISSIB | |
K | |
K-means algorithm | |
L | |
large kernel | |
large language models | |
Last Level Cache | |
Latency | |
LDO | |
LFMCW RADAR | |
LFSR | |
Ling Adder | |
LNA | |
Load balancing | |
Logic Feedback Loop | |
Logic Locking | |
Logic synthesis | |
look-up table design | |
Low Power | |
Low-power design | |
Low-power memory | |
LSSP | |
M | |
Magnetic Tunnel Junction | |
maximum sequence length | |
memory access | |
memory diagnosis | |
memory feature extraction | |
Memristor | |
mixed-signal emulation | |
mm-Waves | |
Modular Multiplier | |
Morphology | |
Multi-chiplet systems | |
multistage noise shaping (MASH) | |
Méthodologie | |
N | |
Near-memory computing | |
Negative Emotions Outburst | |
Network-on-Chip | |
neural network | |
neural networks | |
noise estimation | |
Non Volatile Memory | |
non-equilibrium Green’s function (NEGF) | |
NTT Acceleration | |
Number theoretic transform (NTT) | |
O | |
On-chip PVT compensation | |
Order-preserving cryptography | |
P | |
Packet processing | |
Page migration | |
Parallel Computation | |
Partial Products | |
PathFinder | |
Payload | |
PE utilization | |
performance evaluation | |
Permanent Faults | |
phosphorene nanoribbons | |
Pixel-first dataflow | |
Posit numbers | |
Post-quantum cryptography | |
Post-quantum cryptography (PQC) | |
Power analysis | |
Power Conversion Efficiency | |
Power Converters | |
power Side-Channel Attacks (SCA) | |
Power Supplies | |
Power Supply Network | |
Probabilistic Computing | |
process design kit | |
Processor architecture | |
product validation | |
property checking | |
Pruning Method | |
PUF | |
Q | |
quality assurance | |
Quantum Arithmetic | |
Quantum Circuit | |
Quantum Computers | |
Quantum Computing | |
Quantum Finance Arithmetic | |
R | |
Range-doppler matrix | |
Real number arithmetic | |
Reconfigurable rectifier | |
reliability | |
Reliable systems | |
Reply attacks | |
Resistive crossbars | |
RF energy harvesting | |
RHBD | |
RISC-V | |
RISC-V processor design | |
Robustness | |
routing | |
RRAM | |
RTOS | |
Runtime verification | |
S | |
safety-critical systems | |
Sampler | |
SC-DCDC Converter | |
Scheduling | |
SDN | |
Secure computing | |
Security | |
self-awareness | |
self-healing | |
SEMNU | |
SEU | |
SIB | |
Side channel attack | |
Single-Flux Quantum | |
SmartNICs | |
SoC | |
Soft-error | |
Sparse matrix-vector multiplication | |
SPDM | |
Spintronics | |
SRAM | |
SRAM PUF | |
Static noise margin | |
STTRAM | |
subthreshold swing (SS) | |
Superconductive Electronics | |
System On Chip | |
System-on-Chip | |
Systems Security | |
T | |
T-depth Optimization | |
Task mapping | |
task migration | |
TEA | |
Technology mapping | |
Temperature | |
Tensor Core Unit (TCU) | |
Thermal management | |
Thermal Stability | |
Throughput | |
Time-Domain ADC | |
Tool | |
Track and Hold | |
Trigger | |
Two-layer connected component algorithm | |
V | |
vision transformer | |
Vital Signs Detection | |
VLSI Partitioning | |
Voltage Regulator | |
W | |
Wearable Biomedical Applications | |
weight mapping | |
Wideband LNA | |
Winograd transformation | |
Write distribution | |
Write-intensive | |
Z | |
Zero trust |