FLOC 2022: FEDERATED LOGIC CONFERENCE 2022

This page contains an index consisting of author-provided keywords.

A
Automated Deduction	Towards Synthesis in Superposition
C
Competition	SYNTCOMP Results SyGuS-IF + SemGuS Results
complexity	Complexity of Relational Query Synthesis
Concurrent Programs	Interactive Debugging of Concurrent Programs under Relaxed Memory Models
D
debugging	Interactive Debugging of Concurrent Programs under Relaxed Memory Models
deep learning	LTL Synthesis with Transformer Neural Networks
F
formal methods	Inferring Environment Assumptions in Model Refinement Reactive Synthesis of LTL specifications with Rich Theories
formal verification	Reactive Synthesis of LTL specifications with Rich Theories
L
LTL	LTL Synthesis with Transformer Neural Networks Reactive Synthesis of LTL specifications with Rich Theories
M
Minimum description length	Regex+: Synthesizing Regular Expressions from Positive Examples
O
Open Challenges	Future Work and Open Challenges Panel – Authors+Chairs
P
Panel	Future Work and Open Challenges Panel – Authors+Chairs
Program Synthesis	Towards Synthesis in Superposition Complexity of Relational Query Synthesis Inferring Environment Assumptions in Model Refinement
R
reactive synthesis	A Framework for Transforming Specifications in Reinforcement Learning Inferring Environment Assumptions in Model Refinement
Reactive systems	Reactive Synthesis of LTL specifications with Rich Theories
Realizability	Reactive Synthesis of LTL specifications with Rich Theories
Regular expressions	Regex+: Synthesizing Regular Expressions from Positive Examples
reinforcement learning	A Framework for Transforming Specifications in Reinforcement Learning
Relational Queries	Complexity of Relational Query Synthesis
Relaxed Memory Models	Interactive Debugging of Concurrent Programs under Relaxed Memory Models
Results	SYNTCOMP Results SyGuS-IF + SemGuS Results
S
Superposition Reasoning	Towards Synthesis in Superposition
Symbolic Execution	Interactive Debugging of Concurrent Programs under Relaxed Memory Models
Synthesis	LTL Synthesis with Transformer Neural Networks Interactive Debugging of Concurrent Programs under Relaxed Memory Models Reactive Synthesis of LTL specifications with Rich Theories Inductive and Parameter Synthesis to Find POMDP Controllers Beyond Counterexamples: Satisfiability and Synthesis Modulo Oracles SYNTCOMP Results SyGuS-IF + SemGuS Results Future Work and Open Challenges Panel – Authors+Chairs
T
TBA	Inductive and Parameter Synthesis to Find POMDP Controllers Beyond Counterexamples: Satisfiability and Synthesis Modulo Oracles
TBD	Inductive and Parameter Synthesis to Find POMDP Controllers Beyond Counterexamples: Satisfiability and Synthesis Modulo Oracles
Temporal Logic	A Framework for Transforming Specifications in Reinforcement Learning
theories	Reactive Synthesis of LTL specifications with Rich Theories
V
Version space algebras	Regex+: Synthesizing Regular Expressions from Positive Examples

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