DCIS2024: 39TH CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS
PROGRAM

Days: Wednesday, November 13th Thursday, November 14th Friday, November 15th

Wednesday, November 13th

View this program: with abstractssession overviewtalk overview

11:00-11:40Coffee Break
11:40-13:00 Session 4A: Special session: RISC-V and Open hardware

 

 

11:40
An Educational Tool to Analyze the Hardware/Software Integration in RISC-V Systems (abstract)
12:00
Hardware coprocessor integration with NEORV32: characterization for efficient implementation of RISC-V-based AI SoCs (abstract)
12:20
Deploying Neural Networks on RISC-V with VPUs (abstract)
12:40
AI-based estimation of embedded software execution cycles in host-compiled simulation (abstract)
11:40-13:00 Session 4B: Circuits and systems in advanced and emerging technologies 1
Location: Room "Minerva"
11:40
Functional printing for main distortion points in cured composite parts (abstract)
12:00
Engineering UGR-VCMTCF RRAM Model for Adjusting to TiN/Ti/HfO2/W Devices (abstract)
12:20
Demonstration of a NEMS Comb Drive for the Use of High Speed, High Efficiency Analog Multiplications (abstract)
12:40
On the Importance of Physical Model Parameters for PUF Performance: A Case Study on BFO Memristors (abstract)
11:40-13:00 Session 4C: Special session: GaN Circuits, Systems and Applications
Location: Room "Olimpo"
11:40
A GaN-Based DC-DC Modular Switched Inductor Converter for Shading/Mismatch Mitigation in Bifacial Photovoltaic Systems (abstract)
12:00
A Monolithic GaN shift register with reduced power consumption (abstract)
12:20
A GaN switched-capacitor PWM generator for a current-mode control of switching power converters (abstract)
12:40
Performance Evaluation of GaN HEMTs on Three-Phase and Three-Level ANPC Inverter (abstract)
13:00-15:00Lunch Break
15:00-16:00 Session 5A: Circuits and systems in advanced and emerging technologies 2
15:00
3D printed compact 2-way Wilkison power divider/combiner for RF applications (abstract)
15:20
A Three-Stage Operational Transconductance Amplifier in TFT Flexible-Substrate Process (abstract)
15:40
A novel experiment approach to ohmic contact formation on p-doped SIC (abstract)
15:00-16:00 Session 5B: Test, fault tolerance, reliability and modeling
Location: Room "Minerva"
15:00
Smart Carrier for Scan Chain Emulation of ASIC Prototypes under Test (abstract)
15:20
Single Event Upset Tolerant TRNG Design and Its Tests Under Radiation (abstract)
15:40
Soft-Error Analysis of RRAM 1T1R Compute-In-Memory Core for Artificial Neural Networks (abstract)
15:00-16:00 Session 5C: Sensors Systems and Circuits 1
Location: Room "Olimpo"
15:00
TMOS-based contactless temperature sensor for low-power applications (abstract)
15:20
Integrated Electrode-Based Systems for Stem-Cell Stimulation (abstract)
15:40
Power Oriented Hardware-Software Codesign for a Planetary Exploration Multisensor Instrument (abstract)
16:00-17:00 Session 6A: Energy Management and Harvesting
Chair:
16:00
Design of Switched-Capacitor AC-DC Voltage-Down Converters Driven by Highly Resistive Energy Transducers (abstract)
16:20
The Self-Oscillating Dickson Charge Pump (abstract)
16:40
Steady-State Design Equations of Cross-Coupled Charge Pumps and Application to 28 nm FDSOI Technology (abstract)
16:00-17:00 Session 6B: Industrial and Power Electronics
Location: Room "Minerva"
16:00
Towards efficient hardware digital twins of lithium-ion batteries (abstract)
16:20
Acceleration of a Compute-Intensive Algorithm for Power Electronic Converter Control Using Versal AI Engines (abstract)
16:40
Python and SIMETRIX/SIMPLIS based automated platform for the DC-DC Converter with current mode control (abstract)
16:00-17:00 Session 6C: Sensors Systems and Circuits 2
Location: Room "Olimpo"
16:00
Design and Implementation of the Alpha Mission Satellite Payload for Space Radiation Measurement (abstract)
16:20
A Small-Area Current-Mode Input Σ∆ Modulator for Under-the-Sensors ADC Arrays (abstract)
16:40
A Lightweight Analog RFID Frontend for Interfacing Sensors (abstract)
Thursday, November 14th

View this program: with abstractssession overviewtalk overview

10:00-11:00 Session 8A: IoT and Applications
10:00
Increasing the Accuracy of Spectrogram-based Spectrum Sensing Trained by a Deep Learning Network Using a Resnet-18 Model (abstract)
10:20
Tropical Pruning Strategies for ANN optimization in IoT (abstract)
10:40
A 65 nm CMOS Battery-Less RFID Tag Featuring Short Range Communication with Commodity WiFi (abstract)
10:00-11:00 Session 8B: Hardware Security
Location: Room "Olimpo"
10:00
A Physical Unclonable Function Based on Reconfigurable Latch-Type Sense Amplifiers (abstract)
10:20
Hardware implementations, SCA/FIA attacks, and countermeasures for the ASCON AEAD cipher: a review (abstract)
10:40
Electromagnetic Fault Injection Attack Methodology against AES Hardware Implementation (abstract)
11:00-11:40Coffee Break
11:40-13:00 Session 10A: Digital Circuits and Systems 1
11:40
Digital-to-analog converters based on Time-Interleaved Sigma-Delta Modulation with Analog Multiplexing (abstract)
12:00
Exploring Dual-Frequency Implementation for Semi-Passive RFID Tags (abstract)
12:20
Evaluation of the Versal Intelligent Engines for Digital Signal Processing Basic Core Units (abstract)
12:40
Evaluation and Comparison of Physical Unclonable Functions suitable for FPGA Implementation (abstract)
11:40-13:00 Session 10B: Analog circuits 1
Location: Room "Minerva"
11:40
A Novel Low-Power Subthreshold Voltage Reference Circuit with Enhanced PSRR (abstract)
12:00
Fully-Differential Single-Stage Class-AB Adaptive Nested Current Mirror OTA (abstract)
12:20
Design Guidelines for -Multiplier Current Reference Circuits (abstract)
11:40-13:00 Session 10C: Digital Circuits and Systems 2
Location: Room "Olimpo"
11:40
An Open-Source VLBI Digital Backend for Low-Cost FPGA-based SoCs (abstract)
12:00
A Variable and Extended Precision (VRP) Accelerator and its 22 nm SoC Implementation (abstract)
12:20
FPGA Implementation of a Low-Complexity H.264 Output Coding Stage for Space Missions (abstract)
12:40
Test mode selection and data I/O by means of a new Scan-based interface (abstract)
13:00-15:00Lunch Break
15:00-16:00 Session 11A: Analog circuits 2
Location: Room "Minerva"
15:00
{Parasitic Capacitance Cancellation and SNR Improvement for Capacitance-to-Digital Converters based on a Switched-Capacitor Feedback (abstract)
15:20
A 13.92-ENOB 762ksps Bottom Sampling Capacitive SAR ADC for Medical Applications (abstract)
15:40
Compact System for Stimulation and Recording of Field Potentials from Cardiac Tissue Preparations (abstract)
15:00-16:00 Session 11B: Digital Circuits and Systems 3
Location: Room "Olimpo"
15:00
A Hardware Architecture for Frequency-Domain Image Processing Based on Split-Radix 2-4 FFT (abstract)
15:20
A Comparison of Frequency-to-Digital Conversion Architectures in VCO-ADCs Built with Standar Cells (abstract)
15:40
Adaptive Single-Event Latch-up Protector for Space Applications (abstract)
Friday, November 15th

View this program: with abstractssession overviewtalk overview

10:30-11:40Coffee Break
10:30-11:40 Session 14: Poster session
Utilizing Pattern Matching Technology for Custom Device Signature Flow (abstract)
Energy Harvesting from Ultrasonic Waves Using Piezoceramic Square Shape Transmitter and Receiver Applicable in Biomedical Implanted Devices (abstract)
Asynchronous RISC-V Processor for Embedded Sensors (abstract)
RISC-V System-On-Chip designed to determine the speed of an object and display data on an OLED screen (abstract)
How to implement the Hungarian algorithm into hardware (abstract)
An Innovative On-Chip Ultra-Low Quiescent Current Energy Management Circuit for Battery-less and Harvester IoT Systems (abstract)
HLS Synthesis: Practical hit and miss analysis of AES cipher descriptions (abstract)
Low Power Single-Event Latch-up Detector with Embedded Current Sensor (abstract)
Hands-On IoT: Implementing MQTT protocols for Sensor Networks (abstract)
RISC-V based Spacewire Node implemented on European Radiation Hardened FPGA Devices (abstract)
Comparative Analysis of AI Classification Models for Energy Efficiency on Raspberry Pi IoT Nodes (abstract)
On-Device Dataset Distillation: The MNIST Use Case (abstract)
Preliminary analysis on encompassing IoT devices in a heterogeneous environment exploiting Federated Learning (abstract)
SOC Accelerator Communication Overhead: Impact of Cache, Data Size and Communication Handling (abstract)
A PLL-Based Self-Clocked ECG Data Acquisition Front-End (abstract)
11:40-13:00 Session 15A: EDA Tools and Methods
11:40
AISAD: An AI-Assisted Tool for the High-Level Design of Sigma-Delta Modulators (abstract)
12:00
Optimizing rectangular patch antenna design using machine learning techniques (abstract)
12:20
A MQTT-based infrastructure to support Cooperative Online Learning Activities (abstract)
11:40-13:00 Session 15B: New Computing and Hardware Paradigms
Location: Room "Minerva"
11:40
Cloud-Edge Continuum Infrastructure for Reconfigurable Multi-Accelerator Systems (abstract)
12:00
A Verilog-A superconducting qubit model for cosimulation with control and readout systems in the Cadence Analog Environment (abstract)
12:20
Do Artificial Intelligences Dream of Electric Lambs? An Integrated Multi-Sensor System for AI-Driven Lamb Topology Recognition (abstract)
12:40
Designing DNNs for a trade-off between robustness and processing performance in embedded devices (abstract)
11:40-13:00 Session 15C: Embedded and High-Performance Computing
Location: Room "Olimpo"
11:40
BiDSRS: Resource Efficient Real Time Bidirectional Super Resolution System for FPGAs (abstract)
12:00
A Serial Low-Switching FFT Architecture Specifically Tailored for Low Power Consumption (abstract)
12:20
A Hardware-Efficient 1200-point FFT Architecture that Combines the Prime Factor and Cooley-Tukey Algorithms (abstract)
12:40
A 12.8-GS/s 32-Parallel 1 Million-Point FFT (abstract)
13:30-15:00Lunch Break