Days: Wednesday, November 22nd Thursday, November 23rd Friday, November 24th
View this program: with abstractssession overviewtalk overview
Registration
Welcome by the Rector of the Universitat Politècnica de Catalunya, Enric Fossas.
Prof. David Atienza, EPFL, Switzerland, IEEE CEDA 2018 President
The Internet of Things (IoT) has been hailed as the next frontier of innovation in which our everyday objects are connected in ways that improve our lives and transform industries. The IoT concept is poised to reach 70 billion connected devices by 2025, but major key challenges remain in achieving this potential due to inherent resource-constrained nature of IoT systems, coupled with the computing power requirements of Big Data applications, which can result in degraded and unreliable behavior of IoT nodes, or a global energy crisis when IoT is fully deployed in the future. In this keynote David Atienza will first discuss the challenges of ultra-low power design and communication in IoT nodes and their potential system misbehavior induced by reliability issues and scaled voltages. Then, he will showcase the opportunities for next-generation IoT nodes that combine new embedded systems architecture including novel nanotechnologies and a better understanding on how living organisms operate, in order to gracefully scale the energy consumption and precision of the IoT applications to the requirements of our surrounding world.
11:15 | Random Forest Training Stage Acceleration using Graphics Processing Units ( abstract ) |
11:40 | Implementation of a spatial-spectral classification algorithm using medical hyperspectral images ( abstract ) |
12:05 | Short and Long Distance Marker Detection Technique in Outdoor and Indoor Environments for Embedded Systems ( abstract ) |
12:30 | FPGA synthesis of an stereo image matchig architecture for autonomous mobile robots ( abstract ) |
11:15 | Thermal Tuning and Design Conditions for Bistability in Electrostatically Actuated Microbeam Resonators ( abstract ) |
11:40 | Noise-matching in fully monolithic CMOS-MEMS oscillators for ultrasensitive mass sensing ( abstract ) |
12:05 | Symmetrically loaded differential amplifier for CMOS MEMS resonators ( abstract ) |
11:15 | Digital Implementation of a True RNG using Boolean Chaos ( abstract ) |
11:40 | Automated Test Program Reordering for Efficient SBST ( abstract ) |
12:05 | Crypto-Test-Lab for Security Validation of ECC Co-processor Test Infrastructure ( abstract ) |
12:30 | Design and Validation of a Platform for Electromagnetic Fault Injection ( abstract ) |
14:30 | Experimental verification of an SET generation and propagation model through laser-induced emulation ( abstract ) |
14:55 | Emulation of Multiple Cell Upsets in FPGAs ( abstract ) |
15:20 | Design and Characterization of a Power-On-Reset for High Radiation Environment ( abstract ) |
15:45 | A Generalized Scheme to Enhance Error Detection in the Instruction Set Architecture ( abstract ) |
16:10 | Design Placement Guidelines for Single Event Upset (SEU) Minimization in SRAM-based FPGAs ( abstract ) |
14:30 | Statistical characterization of reliability effects in nanometer CMOS using a versatile transistor array IC ( abstract ) |
14:55 | Efficient Computation of Yield and Lifetime for Analog ICs under Process Variabiliy and Aging ( abstract ) |
15:20 | Modeling for SRAM reliability degradation due to gate oxide breakdown with a compact current model ( abstract ) |
15:45 | A Comparison Study of Time-Dependent Dielectric Breakdown for Analog and Digital Citcuit’s Optimal Test Region ( abstract ) |
16:10 | Detectability of Structural Defects Using Octree Encoding ( abstract ) |
14:30 | A 0.2V-to-5V Fully-Integrated Reconfigurable Buck/Boost Switched-Capacitor Voltage Regulator for Self-Powered Wireless Sensors ( abstract ) |
14:55 | Micropower Class AB Folded Cascode OTA ( abstract ) |
15:20 | Tunable Wide-Band Second-Order All-Pass Filter-Based Time Delay Cell Using Active Inductor ( abstract ) |
15:45 | Design Methodology for Power-Efficient SC Delta-Sigma Modulators Based on Switched-VMAs ( abstract ) |
16:10 | Body Bias Generators for Ultra Low Voltage Circuits in FDSOI Technology ( abstract ) |
17:20 | Digital and analog reconfigurable technologies for reducing Waste of Electrical and Electronics Equipment ( abstract ) |
17:45 | Development of a general purpose robot for teaching embedded systems ( abstract ) |
18:10 | Problem-based learning approach to introduce Analog Electronic Circuits in Biomedical Engineering Degree ( abstract ) |
17:20 | Evaluating High-Level Synthesis Techniques for Scalable Hardware-Accelerated Computing ( abstract ) |
17:45 | Implementation of a fixed-point bit-accurate PI controller in SystemC ( abstract ) |
18:10 | High Level Synthesis Optimization of Scalable Video Codec Interpolators for Zynq SoC ( abstract ) |
17:20 | CCO-Based Analog Front-End for iStents ( abstract ) |
17:45 | A Sub-uVrms Chopper-Stabilized Local Field Potential Amplifier ( abstract ) |
18:10 | Bioimpedance real-time characterization of neointimal tissue inside stents ( abstract ) |
Presentation of IEEE CEDA Spain chapter
Francisco V. Fernández (CEDA Spain Interim Chair), José L. Ayala (CEDA Spain Interim Vice-chair), David Atienza (CEDA President-Elect)
Panel session: Finishing your PhD? And now what?
Moderators: Antonio López (CASS Spain Chair-Elect), Francisco V. Fernández (CEDA Spain Interim Chair)
Panelists:
- David Atienza (École Polytechnique Fédérale de Lausanne, Switzerland)
- Ignasi Cairó (Witeklab SL, Spain)
- Jaime Ramirez Angulo (New Mexico State University, USA)
- Josep Samitier (Instituto de Bioingeniería de Cataluña, Spain)
- Lluis Terés (Instituto de Microelectrónica de Barcelona, Spain)
- Dietmar Straeussnigg (Infineon Technologies, Germany)
Sponsored by Spain Chapters of: IEEE CEDA and IEEE CASS
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Prof. Andrew Adamatzky, University West of England, Bristol.
Unconventional computing is a science in flux. What is unconventional today will be conventional tomorrow. Designs being standard in the past are seen now as a novelty. Unconventional computing is a niche for interdisciplinary science, a cross-breed of computer science, physics, mathematics, chemistry, electronic engineering, biology, materials science and nanotechnology. The aims are to uncover and exploit principles and mechanisms of information processing in, and functional properties of, physical, chemical and living systems to develop efficient algorithms, design optimal architectures and manufacture working prototypes of future and emergent computing devices. In my talk I will provide an overview of selected experimental computing devices, implemented in excitable chemical media, slime mould and plants.
11:15 | A high AOP 67 dB SNR standard CMOS MEMS digital microphone ( abstract ) |
11:40 | Evolution of Networked Embedded Systems from Wireless Sensor Networks to the Internet of Things ( abstract ) |
12:05 | System Optimization and Design of a CMOS Low- Power ASIC for MOX Gas Sensors ( abstract ) |
12:30 | Meaningful Data Treatment from Multiple Physiological Sensors in a Cyber-Physical System ( abstract ) |
12:55 | A High-Resolution Capacitance-to-Digital Converter for MEMS Sensors using Noise-Shaping Dual-Slope ADC ( abstract ) |
11:15 | Skin Effect Formula for Metal Strips in Laminated Substrates ( abstract ) |
11:40 | Variable-Length Transmission Lines for Self-Healing Systems and Reconfigurable Millimeter-Wave Integrated Circuits ( abstract ) |
12:05 | Unified Hardware-Based Description for SAR ADCs with Redundancy ( abstract ) |
12:30 | An Enhanced Current Reuse RF Receiver Front-End for the IEEE 802.15.4 Standard ( abstract ) |
11:15 | On the Modeling of LDO-Assisted DC-DC Voltage Regulators ( abstract ) |
11:40 | Break Even Time Analysis Using Empirical Overhead Parameters for Embedded Systems on SOTB Technology ( abstract ) |
12:05 | Design of an Off-Line Single-Switch Zero-Voltage-Switching Inverter for Magnetron Filament Heating ( abstract ) |
Preamble of IEEE CASS Spanish chapter providing its current activity atlas.
Main debate panel:
- Gerard Villar, NXP semiconductors, Netherlands
- Angel Alvaro, Thales Alenia Space, Tres Cantos, Spain
- Angel Rodríguez-Vazquez, IMSE-CSIC, Univ. Sevilla, former CEO Anafocus
- Jordi Arias, Tech transfer program director, mVentures, Mobile World Capital
- Antonio Lopez Martin, Univ. Navarra, IEEE CASS Spanish chair
- Panel moderator: Prof. Eduard Alarcón, general co-chair, IEEE CASS VP-TA
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Prof. Wouter A. Serdijn, TU Delft, visiting honorary professor at University College London
The 21st century will be the century in which we will unravel the intricacies of the brain and in which we will use electricity to interact with our electro-chemical mainframe better. In this talk I will explain how electroceuticals, the electronic counterparts of pharmaceuticals, can help to successfully treat neurological disorders. Further, I will sketch a technological avenue of their future development by making electroceuticals smaller, more energy efficient, flexible and more intelligent. Examples will be given for fully-implantable bionic ears and neurostimulators for the treatment of tinnitus, Tourette’s syndrome and epilepsy.
10:45 | Quasi stationary equivalent circuit for unipolar RRAM ( abstract ) |
11:10 | SPICE Model for the Ramp Rate Effect in the Reset Characteristic of Memristive Devices ( abstract ) |
11:35 | Admittance memory cycles of Ta2O5:ZrO2-based RRAM devices ( abstract ) |
12:00 | Bulk-based DC offset calibration for Low-power Memristor Array Read-Out System ( abstract ) |
10:45 | CPPS-Gate40 Sensor: an Intelligent Gateway for Smart Factories ( abstract ) |
11:10 | Network Coordinator and Gateway for Autonomous Data Acquisition in Distributed Ocean Monitoring Applications ( abstract ) |
11:35 | Merging Smart Wearable Devices and Wireless Mesh Networs for Collaborative Sensing ( abstract ) |
12:00 | Ultrasonic Communication through Metallic Walls for Monitoring Applications ( abstract ) |
10:45 | The Engineering Challenges for Building a Quantum Computer ( abstract ) |
11:10 | Suitability of asymmetric single-electron transistors to extend the SET-based circuits usage towards nanometer level ( abstract ) |
11:35 | Fault-tolerant Echo State Networks for temporal signal classification ( abstract ) |
12:00 | Full-3D Printed Electronics Process Using Stereolitography and Electroless Plating ( abstract ) |