This paper presents a possible approach to a common framework for FPGA firmware verification, that leverages Cocotb for simulation and Pytest for hardware validation. Together with the Fast Beam Interlock System at the European Spallation Source, this approach improves test automation, code reusability, and even test coverage. Having standardized test structures also improves continuous integration, maintainability, test reports, and auditing. Preliminary results show improved efficiency, especially in Factory Acceptance Testing (FAT).