FLOC 2018: FEDERATED LOGIC CONFERENCE 2018
PROGRAM
AUTHORS
KEYWORDS
SLIDES
FLoC
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FoPSS
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ITP
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CSF
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FSCD
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SAT
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CAV
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IJCAR
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ICLP
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FM
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LICS
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ADHS
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ADSL
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ARQNL
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ASPOCP
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AVOCS
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CL&C
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COALG
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Coq
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DCM
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Domains13
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DS-FM
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EICNCL
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F-IDE
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FCS
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FRIDA
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GraMSec
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GS
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HCVS
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HDRA
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HOR
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HoTT/UF
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ICLP-DC
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IFIP WG 1.6
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Isabelle
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ITRS
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IWC
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LaSh
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LCC
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LearnAut
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LFMTP
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Linearity/TLLA
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LMW
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LOLA
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LPOP
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LSB
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MLP
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MoRe
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MSFP
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NLCS
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NSV
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Overture
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PAAR
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PARIS
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PC
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PLR
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POS
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PRUV
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QBF
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RCRA
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REFINE
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ReMOTE
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rv4rise
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SCSC
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SMT
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SoMLMFM
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SR
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SYNT
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TERMGRAPH
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Tetrapod
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ThEdu
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TLA
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TYDI
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UITP
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UNIF
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Vampire
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VaVAS
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VDMW
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VEMDP
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VSTTE
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WiL
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WPTE
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WST
PROGRAM
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AUTHORS
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KEYWORDS
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SLIDES
TALK AUTHOR INDEX
Shortcuts:
A
B
D
F
K
L
T
A
Abbas
, Houssam
Using the F1/10 Autonomous Racing Platform for Runtime Verification Research
B
Belta
, Calin
Signal classification using temporal logic
D
Dreossi
, Tommaso
Systematic analysis and improvement of CNNs.
F
Ferrère
, Thomas
First order temporal properties of continuous signals
K
Kapinski
, Jim
Formalizing Requirements for Cyber-Physical Systems: Real-World Experiences and Challenges
L
Leucker
, Martin
Hardware-based runtime verification with Tessla
T
Torfah
, Hazem
Real-time Stream Processing with RTLola
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