Talk Author Index

TALK AUTHOR INDEX

Shortcuts: A B C D E F G H I J K L M N O P R S T U V W Y Z

A
A. Fahmy, Suhaib	Heterogeneous Communication Virtualisation for Distributed Embedded Applications
Abd El Ghany, Mohamed A.	Near-Data-Processing Architectures Performance Estimation and Ranking using Machine Learning Predictors
Abella, Jaume	Enabling Unit Testing of Already-Integrated AI-based Software Systems: The Case of Apollo for Autonomous Driving
Agosta, Giovanni	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Alcon, Miguel	Enabling Unit Testing of Already-Integrated AI-based Software Systems: The Case of Apollo for Autonomous Driving
Aldinucci, Marco	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Ali, Muhammad	Vector Processing Unit: A RISC-V based SIMD Co-processor for Embedded Processing
Aljuffri, Abdullah	Revealing the secrets of Spiking Neural Networks: the case of Izhikevich neuron
Alvarez, Carlos	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Ammendola, Roberto	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Anderson, Jason	An Open-Source Framework for the Generation of RISC-V Processor + CGRA Accelerator Systems
Antonopoulos, Christos	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Arani, Elahe	Improving the Efficiency of Transformers for Resource-Constrained Devices
Arcaya Jordan, Alexis	Modeling Battery SoC Predictions for Smart Connected Glasses Simulations
Arfat, Yasir	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Arvieu, Thomas	Pre-Integrated Architectures for sustainable complex Cyber-Physical Systems
Ascheid, Gerd	Runnable Configuration in Mixed Classic/Adaptive AUTOSAR Systems by Leveraging Nondeterminism
Ashraf, Kanwal	Model-based System Architecture for Event-triggered Wireless Control of Bio-analytical Devices
Awan, Dr. Ahsan Javed	NMPO: Near-Memory Computing Profiling and Offloading
B
Badaroux, Marie	To Pin or Not to Pin: Asserting the Scalability of QEMU Parallel Implementation
Bagnato, Alessandra	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Bai, Yu	Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns
Balasubramaniam, Ajay	Improving the Efficiency of Transformers for Resource-Constrained Devices
Balasubramanian, Padmanabhan	A Boolean Heuristic for Disjoint SOP Synthesis
Basener, Kai-Uwe	Towards Machine Learning Support for Embedded System Tests
Baunach, Marcel	A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime
Beaumont, Olivier	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Becker, Jürgen	Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks
Behal, Patrick	An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits
Bellocchi, Gianluca	A RISC-V-based FPGA Overlay to SimplifyEmbedded Accelerator Deployment
Berardinelli, Luca	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Bernaschi, Massimo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Bernasconi, Anna	A Boolean Heuristic for Disjoint SOP Synthesis
Beroulle, Vincent	MaDMAN: Detection of Software Attacks Targeting Hardware Vulnerabilities
Bertolucci, Matteo	Highly Parallel Sample Rate Converter for Space Telemetry Transmitters
Biagioni, Andrea	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Bielefeldt, Jens	Towards Machine Learning Support for Embedded System Tests
Boccali, Tommaso	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Borra, Kavya	Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher
Bouganis, Christos-Savvas	POMMEL: Exploring Off-Chip Memory Energy & Power Consumption in Convolutional Neural Network Accelerators
Bramas, Berenger	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Brandolese, Carlo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Branlard, Julien	Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems
Brinkfeldt, Klas	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
Bruneliere, Hugo	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Brungs, Peter	A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime
Bulut, Barış	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
C
Cantalupo, Barbara	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Cantoro, Riccardo	Maximizing the Switching Activity of Different Modules Within a Processor Core via Evolutionary Techniques
Capotondi, Alessandro	A RISC-V-based FPGA Overlay to SimplifyEmbedded Accelerator Deployment
Castagnetti, Andrea	Modeling Battery SoC Predictions for Smart Connected Glasses Simulations
Cazorla, Francisco J.	Enabling Unit Testing of Already-Integrated AI-based Software Systems: The Case of Apollo for Autonomous Driving
Celino, Massimo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Cenkeramaddi, Linga Reddy	Architectural Implementation of a Reconfigurable NoC Design for Multi-Applications
Chakraborty, Samarjit	Heterogeneous Communication Virtualisation for Distributed Embedded Applications
Christakos, Panagiotis	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Cicchetti, Antonio	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Cilardo, Alessandro	FPGA-based real-time monitoring support for CANOpen applications
Ciriani, Valentina	A Boolean Heuristic for Disjoint SOP Synthesis
Claesen, Thomas	Novel non-cryptographic hash functions for networking and security applications on FPGA
Clavo, Bernardino	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
Clement, Philipp	Measuring trust in automated driving using amulti-level approach to human factors
Colonnelli, Iacopo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Conrady, Simon	A Framework for Hardware-Accelerated Design Space Exploration for Approximate Computing on FPGA
Conti, Francesco	A RISC-V-based FPGA Overlay to SimplifyEmbedded Accelerator Deployment
Copic, Milan	Runnable Configuration in Mixed Classic/Adaptive AUTOSAR Systems by Leveraging Nondeterminism
Corda, Stefano	NMPO: Near-Memory Computing Profiling and Offloading
Corporaal, Henk	NMPO: Near-Memory Computing Profiling and Offloading
Cortadella, Jordi	Decomposition of transition systems into sets of synchronizing state machines
Cretaro, Paolo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
D
D'Ambra, Pasqua	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
D'Andrea, Gabriella	An Investigation of Dynamic Partial Reconfiguration Offloading in Hard Real-Time Systems
Dabiri, Bita	Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design
Danelutto, Marco	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Daneshtalab, Masoud	Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design
Danger, Jean-Luc	Protected Extension of Cryptographic Algorithms on RISC-V Analysis of a Laser-induced Instructions Replay Fault Model in a 32-bit Microcontroller
Danzinger, Herbert	Measuring trust in automated driving using amulti-level approach to human factors
Daporta, Emil	Checkpointing Period Optimization of Distributed Fail-Operational Automotive Applications
Deligiannis, Nikolaos	Maximizing the Switching Activity of Different Modules Within a Processor Core via Evolutionary Techniques
Dey, Soumyajit	Co-designing Intelligent Control of Building HVACs and Microgrids
Di Mascio, Tania	An Investigation of Dynamic Partial Reconfiguration Offloading in Hard Real-Time Systems
Dimopoulos, Charis	Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms
Drechsler, Rolf	Automated Debugging-Aware Visualization Technique for SystemC HLS Designs
Drechsler, Rolf	Combining SWAPs and Remote CNOT Gates for Quantum Circuit Transformation
Druml, Norbert	An adaptive pixel accumulation algorithm for a 1D micro-scanning LiDAR Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras Programmable Systems for Intelligence in Automobiles (PRYSTINE): Final results after Year 3
Dutertre, Jean-Max	Analysis of a Laser-induced Instructions Replay Fault Model in a 32-bit Microcontroller
Dyka, Zoya	Optical Fault Injection Attacks against Radiation-Hard Registers
Dörr, Tobias	Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks
E
Eichberger, Arno	Measuring trust in automated driving using amulti-level approach to human factors
Eichler, Annika	Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems
El-Kady, Islam Alexander	Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms
Eramo, Romina	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Esposito, Roberto	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Eyraud-Dubois, Lionel	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
F
Fabelo, Himar	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
Fanucci, Luca	Highly Parallel Sample Rate Converter for Space Telemetry Transmitters
Fey, Goerschwin	Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems Metrics for the Evaluation of Approximate Sequential Streaming Circuits
Filgueras, Antonio	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Fischer, Thomas	Towards a More Flexible IoT SAFE Implementation
Fornaciari, William	BarMan: Managing the Resource Continuum in a Real Video Surveillance Scenario TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Fournaris, Apostolos	Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms
Frezza, Ottorino	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
G
Galimberti, Andrea	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Garaffa, Luiza	Revealing the secrets of Spiking Neural Networks: the case of Izhikevich neuron
Geilen, Marc	A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments
Giacomini, Francesco	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Giammatteo, Paolo	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
Goehringer, Diana	Near-Data-Processing Architectures Performance Estimation and Ranking using Machine Learning Predictors Vector Processing Unit: A RISC-V based SIMD Co-processor for Embedded Processing
Goglin, Brice	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Goli, Mehran	Automated Debugging-Aware Visualization Technique for SystemC HLS Designs
Gomez, Abel	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Goossens, Kees	A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments
Goswami, Dip	A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments
Goubier, Thierry	Pre-Integrated Architectures for sustainable complex Cyber-Physical Systems
Gougeon, Philippe	Pre-Integrated Architectures for sustainable complex Cyber-Physical Systems
Graba, Tarik	Protected Extension of Cryptographic Algorithms on RISC-V
Grünhagen, Arne	Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems
Guermouche, Abdou	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
H
Ha, Soonhoi	Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
Haleplidis, Evangelos	Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms
Hamdioui, Said	Protecting IoT Devices through a Hardware-driven Memory Verification Revealing the secrets of Spiking Neural Networks: the case of Izhikevich neuron
Handel, Sebastian	Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras
Hanif, Muhammad Abdullah	TRe-Map: Towards Reducing the Overheads of Fault-Aware Retraining of Deep Neural Networks by Merging Fault Map
Hemani, Ahmed	Scheduling Persistent and Fully Cooperative Instructions
Hillebrand, Joachim	Going to the Edge - Bringing Internet of Things and Artificial Intelligence Together
Hoang, Le-Ha	TRe-Map: Towards Reducing the Overheads of Fault-Aware Retraining of Deep Neural Networks by Merging Fault Map
Huang, Juinn-Dar	Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip
Huemer, Florian	An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits
Hussein, Mahmoud	Builing Blocks and Interaction Patterns of Unmanned Aerial Systems
Hübner, Michael	Towards Machine Learning Support for Embedded System Tests
I
Iannone, Francesco	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Iskandar, Veronia	Near-Data-Processing Architectures Performance Estimation and Ranking using Machine Learning Predictors
J
J, Soumya	Architectural Implementation of a Reconfigurable NoC Design for Multi-Applications
Jana, Rajib	Co-designing Intelligent Control of Building HVACs and Microgrids
Jenihhin, Maksim	Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules
Jordans, Roel	NMPO: Near-Memory Computing Profiling and Offloading
K
Kalali, Ercan	A Power-Efficient Parameter Quantization Technique for CNN Accelerators
Kang, Jintaek	Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
Karner, Michael	Going to the Edge - Bringing Internet of Things and Artificial Intelligence Together
Keramidas, Georgios	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Khuat, Vanthanh	Analysis of a Laser-induced Instructions Replay Fault Model in a 32-bit Microcontroller
Kitsos, Paris	5G Security: FPGA Implementation of SNOW-V Stream Cipher
Klocker, Manuela	Going to the Edge - Bringing Internet of Things and Artificial Intelligence Together
Kocnová, Jitka	Resynthesis of logic circuits using machine learning and reconvergent paths
Koedam, Martijn	A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments
Kotasek, Zdenek	Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs Reliability Analysis of the FPGA Control System with Reconfiguration Hardening
Koufopavlou, Odysseas	Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms
Kowalczyk, Marcin	A Connected Component Labelling algorithm for multi-pixel per clock cycle video stream
Kreddig, Arne	A Framework for Hardware-Accelerated Design Space Exploration for Approximate Computing on FPGA
Krishna Murthy, Dharshan	Controlled Intra-Platoon Collisions for Emergency Braking in Close-Distance Driving Arrangements
Kryjak, Tomasz	A Connected Component Labelling algorithm for multi-pixel per clock cycle video stream
Kubatova, Hana	Secure and dependable: Area-efficient masked and fault-tolerant architectures
Kulczewski, Michal	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Kumaraswamy, Madhurya	NMPO: Near-Memory Computing Profiling and Offloading
Könczöl, Clemens	Measuring trust in automated driving using amulti-level approach to human factors
Köylü, Troya Çağıl	Protecting IoT Devices through a Hardware-driven Memory Verification
L
Langendoerfer, Peter	Optical Fault Injection Attacks against Radiation-Hard Registers
Le Moullec, Yannick	Model-based System Architecture for Event-triggered Wireless Control of Bio-analytical Devices
Le Nours, Sébastien	Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems
Lee, Keonjoo	Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
Lee, Seungwook	Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
Lentaris, George	ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs
Leon, Raquel	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
Leon, Vasileios	ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs
Leupers, Rainer	Runnable Configuration in Mixed Classic/Adaptive AUTOSAR Systems by Leveraging Nondeterminism
Ling, Xiaoyi	An Open-Source Framework for the Generation of RISC-V Processor + CGRA Accelerator Systems
Lo Cicero, Francesco	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Lojda, Jakub	Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs Reliability Analysis of the FPGA Control System with Reconfiguration Hardening
Lonardo, Alessandro	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Lu, Zhonghai	Evaluation of Time Series Clustering in Embedded Sensor Platform
M
M. Callico, Gustavo	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
Macher, Georg	Measuring trust in automated driving using amulti-level approach to human factors
Mahzoon, Alireza	Automated Debugging-Aware Visualization Technique for SystemC HLS Designs
Maier, Jürgen	Gain and Pain of a Reliable Delay Model
Maksymova, Ievgeniia	An adaptive pixel accumulation algorithm for a 1D micro-scanning LiDAR
Manuel, Manu	A Framework for Hardware-Accelerated Design Space Exploration for Approximate Computing on FPGA
Marongiu, Andrea	A RISC-V-based FPGA Overlay to SimplifyEmbedded Accelerator Deployment
Martinez-Vega, Beatriz	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
Martino, Gianluca	Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems Metrics for the Evaluation of Approximate Sequential Streaming Circuits
Martorell, Xavier	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Marzban, Shabbir	Improving the Efficiency of Transformers for Resource-Constrained Devices
Masburah, Rumia	Co-designing Intelligent Control of Building HVACs and Microgrids
Masrur, Alejandro	Controlled Intra-Platoon Collisions for Emergency Braking in Close-Distance Driving Arrangements
Massari, Giuseppe	BarMan: Managing the Resource Continuum in a Real Video Surveillance Scenario TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Mathur, Vaibhavi	Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher
Matute, Jose A.	MPC-Based Speed Tracking for Automated Urban Buses Performing V2I Communications with Traffic Lights
Memos Bagkratsas, Ioannis	Digital Forensics, Video Forgery Recognition, for Cyber Security Systems
Mentens, Nele	Novel non-cryptographic hash functions for networking and security applications on FPGA
Mercogliano, Stefano	FPGA-based real-time monitoring support for CANOpen applications
Miroddi, Saverio	To Pin or Not to Pin: Asserting the Scalability of QEMU Parallel Implementation
Miškovský, Vojtěch	Secure and dependable: Area-efficient masked and fault-tolerant architectures
Modarressi, Mehdi	Network-on-ReRAM for Scalable Processing-in-Memory Architecture Design
Mohr, Hannes	Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks
Montangero, Simone	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Montgomerie-Corcoran, Alexander	POMMEL: Exploring Off-Chip Memory Energy & Power Consumption in Convolutional Neural Network Accelerators
Moser, Josef	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
Mousouliotis, Panagiotis	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Mueller, Luca	Combining SWAPs and Remote CNOT Gates for Quantum Circuit Transformation
Murovic, Tadej	Massively parallel binary neural network inference for detecting ships in FPGA systems on the edge
Muttillo, Vittoriano	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
N
Nahler, Caterina	Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras
Nair M K, Aparna	Architectural Implementation of a Reconfigurable NoC Design for Multi-Applications
Najvirt, Robert	An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits
Namyst, Raymond	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Nelson, Andrew	A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments
Nguyen, Kevin	Pre-Integrated Architectures for sustainable complex Cyber-Physical Systems
Niemann, Philipp	Combining SWAPs and Remote CNOT Gates for Quantum Circuit Transformation
Notsu, Takahiro	An Open-Source Framework for the Generation of RISC-V Processor + CGRA Accelerator Systems
Nouacer, Réda	Builing Blocks and Interaction Patterns of Unmanned Aerial Systems
Novak, Ondrej	Search Strategy of Large Nonlinear Block Codes
Novickis, Rihards	An efficient FPGA-based co-processor for sparse optical flow calculation in drone agents
Novotny, Martin	Secure and dependable: Area-efficient masked and fault-tolerant architectures
O
Okkerman, Hans	Protecting IoT Devices through a Hardware-driven Memory Verification
Oleksiak, Ariel	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Ortega, Samuel	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
Oyeniran, Adeboye Stephen	Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules
P
Palazzari, Paolo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Panek, Richard	Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs Reliability Analysis of the FPGA Control System with Reconfiguration Hardening
Paolucci, Pier Stanislao	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Pardy, Tamás	Model-based System Architecture for Event-triggered Wireless Control of Bio-analytical Devices
Paul, Kolin	Scheduling Persistent and Fully Cooperative Instructions
Pegatoquet, Alain	Modeling Battery SoC Predictions for Smart Connected Glasses Simulations
Perez, Joshue	MPC-Based Speed Tracking for Automated Urban Buses Performing V2I Communications with Traffic Lights
Petrellis, Nikos	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Petrongonas, Evangelos	ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs
Petrot, Frederic	To Pin or Not to Pin: Asserting the Scalability of QEMU Parallel Implementation
Petryk, Dmytro	Optical Fault Injection Attacks against Radiation-Hard Registers
Pham, Thinh	Heterogeneous Communication Virtualisation for Distributed Embedded Applications
Pillement, Sébastien	Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems
Pirker, Dominic	Towards a More Flexible IoT SAFE Implementation
Plambeck, Swantje	Metrics for the Evaluation of Approximate Sequential Streaming Circuits
Plank, Hannes	Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras
Podivínský, Jakub	Reliability Analysis of the FPGA Control System with Reconfiguration Hardening
Polian, Ilia	Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities
Polychronou, Nikolaos-Foivos	MaDMAN: Detection of Software Attacks Targeting Hardware Vulnerabilities
Pomante, Luigi	An Investigation of Dynamic Partial Reconfiguration Offloading in Hard Real-Time Systems
Pressel, Klaus	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
Puys, Maxime	MaDMAN: Detection of Software Attacks Targeting Hardware Vulnerabilities
Pyrgas, Lampros	5G Security: FPGA Implementation of SNOW-V Stream Cipher
R
Rafique, Omair	Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns
Raik, Jaan	Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules
Rang, Toomas	Model-based System Architecture for Event-triggered Wireless Control of Bio-analytical Devices
Rao, Nanditha	Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher
Regazzoni, Francesco	Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities
Reghenzani, Federico	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Reiter, Christoph	Towards a More Flexible IoT SAFE Implementation
Roy, Sudip	Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip
Ryu, Soojung	Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
Rzepka, Sven	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
S
Sadovykh, Andrey	AIDOaRt: AI-augmented automation for DevOps, a model-based framework for continuous development At RunTime in cyber-physical systems
Samano Robles, Ramiro	Going to the Edge - Bringing Internet of Things and Artificial Intelligence Together
Sandmann, Timo	Employing the Concept of Multilevel Security to Generate Access Protection Configurations for Automotive On-Board Networks
Saponara, Sergio	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Sateesan, Arish	Novel non-cryptographic hash functions for networking and security applications on FPGA
Schaeffner, Jan	Optical Fault Injection Attacks against Radiation-Hard Registers
Scharoba, Stefan	Towards Machine Learning Support for Embedded System Tests
Scheipel, Tobias	A Hardware/Software Concept for Partial Logic Updates of Embedded Soft Processors at Runtime
Schlarb, Holger	Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems
Schneider, Klaus	Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns
Schoenlieb, Armin	Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras
Sciamanna, Filippo	BarMan: Managing the Resource Continuum in a Real Video Surveillance Scenario
Sepulveda, Johanna	Towards Post-Quantum Enhanced Identity-based Encryption Revealing the secrets of Spiking Neural Networks: the case of Izhikevich neuron
Shafique, Muhammad	TRe-Map: Towards Reducing the Overheads of Fault-Aware Retraining of Deep Neural Networks by Merging Fault Map
Shah, Shivani	Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher
Shreejith, Shanker	Heterogeneous Communication Virtualisation for Distributed Embedded Applications
Si Merabet, Abdelmalek	Protected Extension of Cryptographic Algorithms on RISC-V
Simula, Francesco	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Sinha, Sayan	Co-designing Intelligent Control of Building HVACs and Microgrids
Sklavos, Nicolas	Digital Forensics, Video Forgery Recognition, for Cyber Security Systems
Sonza Reorda, Matteo	Maximizing the Switching Activity of Different Modules Within a Processor Core via Evolutionary Techniques
Sorge, Roland	Optical Fault Injection Attacks against Radiation-Hard Registers
Soudris, Dimitrios	ParalOS: A Scheduling & Memory Management Framework for Heterogeneous VPUs
Soyturk, Mujdat	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
Stechele, Walter	A Framework for Hardware-Accelerated Design Space Exploration for Approximate Computing on FPGA
Steger, Christian	An adaptive pixel accumulation algorithm for a 1D micro-scanning LiDAR Single-Frame Direct Reflectance Estimation With Indirect Time-of-Flight Cameras Towards a More Flexible IoT SAFE Implementation
Steinhorst, Sebastian	Heterogeneous Communication Virtualisation for Distributed Embedded Applications Checkpointing Period Optimization of Distributed Fail-Operational Automotive Applications
Steininger, Andreas	An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits
Stūrmanis, Toms	An efficient FPGA-based co-processor for sparse optical flow calculation in drone agents
Suarez-Vega, David	Oxygen Saturation Measurement using Hyperspectral Imaging targeting Real-Time Monitoring
T
Tabani, Hamid	Enabling Unit Testing of Already-Integrated AI-based Software Systems: The Case of Apollo for Autonomous Driving
Tabani, Hamid	Improving the Efficiency of Transformers for Resource-Constrained Devices
Tabatabaei Nikkhah, Shayan	A Deployment Framework for Quality-Sensitive Applications in Resource-Constrained Dynamic Environments
Taouil, Mottaqiallah	Protecting IoT Devices through a Hardware-driven Memory Verification Revealing the secrets of Spiking Neural Networks: the case of Izhikevich neuron
Tehrani, Etienne	Protected Extension of Cryptographic Algorithms on RISC-V
Teren, Viktor	Decomposition of transition systems into sets of synchronizing state machines
Terraneo, Federico	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Thevenon, Pierre-Henri	MaDMAN: Detection of Software Attacks Targeting Hardware Vulnerabilities
Thibault, Samuel	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Torquati, Massimo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Trost, Andrej	Massively parallel binary neural network inference for detecting ships in FPGA systems on the edge
Tsakoulis, Thanasis	Studying OpenCL-based Number Theoretic Transform for heterogeneous platforms
Turisini, Matteo	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
U
Ubar, Raimund	Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules
V
Vaca, Myriam	MPC-Based Speed Tracking for Automated Urban Buses Performing V2I Communications with Traffic Lights
Valencia, Felipe	Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities
Valente, Giacomo	An Investigation of Dynamic Partial Reconfiguration Offloading in Hard Real-Time Systems
van Driel, Willem	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
van Leuken, Rene	A Power-Efficient Parameter Quantization Technique for CNN Accelerators
Vasicek, Zdenek	Resynthesis of logic circuits using machine learning and reconvergent paths
Veledar, Omar	Measuring trust in automated driving using amulti-level approach to human factors
Verchyk, Dariia	Towards Post-Quantum Enhanced Identity-based Encryption
Vicini, Piero	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Vidal, Miquel	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Villa, Tiziano	A Boolean Heuristic for Disjoint SOP Synthesis Decomposition of transition systems into sets of synchronizing state machines
Vliegen, Jo	Novel non-cryptographic hash functions for networking and security applications on FPGA
Von Ameln, Matthias	Vector Processing Unit: A RISC-V based SIMD Co-processor for Embedded Processing
Voros, Nikolaos	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Vu, Hai-Dang	Experimental Evaluation of Statistical Model Checking Methods for Probabilistic Timing Analysis of Multiprocessor Systems
Vutakuru, Sahithi Meenakshi	Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher
W
Wedig Reinbrecht, Cezar Rodolfo	Protecting IoT Devices through a Hardware-driven Memory Verification Revealing the secrets of Spiking Neural Networks: the case of Izhikevich neuron
Weichslgartner, Andreas	Checkpointing Period Optimization of Distributed Fail-Operational Automotive Applications
Weiss, Philipp	Checkpointing Period Optimization of Distributed Fail-Operational Automotive Applications
Wiesbrock, Hans-Werner	Towards Machine Learning Support for Embedded System Tests
Witschnig, Harald	Towards a More Flexible IoT SAFE Implementation
Y
Yamashita, Shigeru	Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip
Yan, Guangxi	Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns
Yang, Yu	Scheduling Persistent and Fully Cooperative Instructions
Yi, Changjae	Fast Simulation of a Many-NPU Network-on-Chip for Microarchitectural Design Space Exploration
Ying, Shuaijie	Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip
Z
Zanella, Michele	BarMan: Managing the Resource Continuum in a Real Video Surveillance Scenario
Zhao, Susan	The H2020-ECSEL Project ”iRel40” (Intelligent Reliability 4.0)
Zhu, Qi	Co-designing Intelligent Control of Building HVACs and Microgrids
Zhu, Wenyao	Evaluation of Time Series Clustering in Embedded Sensor Platform
Zogas, Stavros	High Speed Implementation of the Deformable Shape Tracking Face Alignment Algorithm
Zoni, Davide	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale
Zonooz, Bahram	Improving the Efficiency of Transformers for Resource-Constrained Devices
Zummo, Giuseppe	TEXTAROSSA: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale