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Verification of Fault-Tolerant Clock Synchronization Algorithms

6 pagesPublished: February 1, 2017

Abstract

In this paper we propose a benchmark for verification of properties of fault-tolerant
clock synchronization algorithms, namely, a benchmark of a TTEthernet network, where
properties of the clock synchronization algorithm as implemented in a TTEthernet network can be verified, and optimization techniques for verification purposes can be applied.
Our benchmark, which assumes non-faulty components, aims to be a basis for verifying
configurations which include faulty components, information consistency mechanisms, and for verifying other clock synchronization algorithms.

Keyphrases: benchmark, Clock Synchronization Algorithm, hybrid automata, model checking, quasi-dependent variables, TTEthernet, verification

In: Goran Frehse and Matthias Althoff (editors). ARCH16. 3rd International Workshop on Applied Verification for Continuous and Hybrid Systems, vol 43, pages 36--41

Links:
BibTeX entry
@inproceedings{ARCH16:Verification_of_Fault_Tolerant_Clock,
  author    = {Sergiy Bogomolov and Christian Herrera and Wilfried Steiner},
  title     = {Verification of Fault-Tolerant Clock Synchronization Algorithms},
  booktitle = {ARCH16. 3rd International Workshop on Applied Verification for Continuous and Hybrid Systems},
  editor    = {Goran Frehse and Matthias Althoff},
  series    = {EPiC Series in Computing},
  volume    = {43},
  pages     = {36--41},
  year      = {2017},
  publisher = {EasyChair},
  bibsource = {EasyChair, https://easychair.org},
  issn      = {2398-7340},
  url       = {https://easychair.org/publications/paper/fdQv},
  doi       = {10.29007/hq8s}}

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