ABSTRACT. We successfully applied high frequency scanning acoustic microscopy (SAM) as a tool for the analysis of  MEMS sensors. Using state of the art transducers with frequencies up to 300 MHz, we evaluated the achievable resolution and performed case studies: we localized a contamination-induced delamination on the ASIC surface and studied failure modes after mechanical stability tests, showing that a combination of SAM and infrared microscopical evaluation provides information about the course of cracks on a micrometer length scale.

ABSTRACT. The present paper aims to provide a better insight to the dielectric charging phenomena of nano-crystalline diamond (NCD) films that are used in RF MEMS capacitive switches. The electrical properties of NCD films of various thicknesses are investigated with the aid of metal-insulator-metal (MIM) capacitors. The dominant conduction mechanisms have been identified by obtaining current-voltage characteristics in the temperature range from 300 K to 400 K and dielectric charging phenomena have been investigated by using thermally stimulated depolarization currents (TSDC) technique. The experimental results indicate a thermally activated conductivity for low electric field intensities while Hill-type conduction takes place for field intensities greater than 130 kV/cm. The conductivity as well as the defect density seems to increase with film thickness. Enhanced dielectric charging phenomena have been observed on thicker films and the injected charges are found to be trapped through the material’s volume. These results indicate that thinner NCD films seems to be more promising for RF MEMS capacitive switches.

ABSTRACT. Silicon based pressure sensors often take advantage of piezo-resistive gages which are normally embedded by multiple silicon oxide and silicon nitride layers where gold lines form a Wheatstone bridge. As a result of manufacturing – stepwise deposition of  multiple layers – significant layer residual stresses in the GPa range occure in tension and  compression. Especially in avionics MEMS applications such stresses determine the major risks for cracking and delamination. To overcome the related reliability issues the authors performed experiments and nonlinear FEM-simulations. Basic information about the residual stresses in the gage stack were captured by a Focused Ion Beam (FIB) trench technique combined with digital image correlation. These results enriched the data base for finite element studies with the ABAQUS™. Especially delamination risks were investigated by a surface based cohesive contact approach which simulates the initiation and propagation of damage and cracking within and underneath the gage layer. The cracking risk is investigated by means of an Extended Finite Element Method (XFEM). Both, crack initiation location as well as crack path are results of XFEM simulations. Several design variations have been investigated and compared to give insights to potential crack initiation sites and to evaluate the risk of fracture during processing.

ABSTRACT. The failure behavior of MEMS can be regarded as the result of certain dependent failure mechanisms in accordance with device’s internal attributes and external environment. However, the correlative effects among multiple mechanisms that governing the failure process of MEMS have not been well characterized. This paper reviews significant failure mechanisms of MEMS products and proposes a new correlative model for MEMS reliability evaluation. Based on the nature of different failure mechanisms, dependent factors of these correlations are discussed and mathematical models are derived. With a case, reliability of a sort of RF switch is evaluated taking into account the failure mechanism correlative effects, and sensitivity analysis is conducted to assess the effects of the model parameters on reliability function R(t) and failure time distribution f (t) .

ABSTRACT. In this study, the focus was on the design for reliable wafer level hermetic Sn-Au based interconnection for MEMS devices by optimizing the contact metallization structures. The investigations were done in two parts: i) the formation and evolution of interconnection microstructures in AuSn|Cu, AuSn|Ni and AuSn|Pt systems were studied with bulk diffusion couples and ii) thin film structures (i.e. adhesion layers and diffusion barriers) for Pt metallization on AuSn SLID bonded wafers were investigated from manufacturability and reliability viewpoints. The failure analysis was carried out on as bonded as well as aged interconnections. Distinct thin film structures showed clear differences in shear strength and fracture mechanisms. The mechanical reliability of the interconnection was increased by i) introducing sputtered Ni metallization between TiW and AuSn bond, ii) increasing the Pt thickness from 100 nm to 200 nm and iii) using Mo diffusion barrier underneath the Pt layer. Based on the results obtained from diffusion couples the thermodynamic descriptions of the ternary systems were re-assessed and the thermodynamic data was utilized in rationalizing the observed interconnection microstructures, failure mechanisms in thin film samples and the effect of Pt metallization thickness on the re-melting temperature of the SLID bond.

ABSTRACT. The mechanism of creeping corrosion of copper has been studied and is understood. Creeping corrosion of copper occurs when low concentration of hydrogen sulfide (< 1 ppm H2S) in combination with a relative humidity greater than 60 % meets with bare copper on the bottom of a crack or pinhole. The forming copper sulfide is immobile but can be attacked by oxidizing agents and will diffuse in form of mobile copper oxide in a water layer (i. e. more than three molecule layers H2O) out of the pinhole. There it is retransformed again to immobile copper sulfide by attacking hydrogen sulfide. This is the reason that we find copper sulfide in combination with copper oxide a long distance away from the source of the copper, even if copper sulfide actually is immobile. In the humidity layer on a surface not only hydrogen sulfide acid as the essential corrosive substance is present but also oxidizing agents like O2, SO2 or NO2. The proportion between hydrogen sulfide and the oxidizing gases decides if copper oxide can be formed and creeping corrosion will start. In a microclimate like a hole or a crack the relation between oxidizing gases/acids and hydrogen sulfide is shifting to very low hydrogen sulfide concentration and the suggested mechanism will occur if enough oxidizing substances are present. Palladium in form of a nickel-palladium finish can act as a catalyst under certain circumstances. If H2S plus oxidizing gases as well as a humidity layer are present and cracks in bent copper pins supply the microclimate that is needed for creeping corrosion then a catalytic assisted corrosion takes place. The corrosive gases in the water layer are catalytically oxidized to form stronger acids and the forming copper oxide Cu2O from CuS is oxidized to smaller and more stable CuO that is more mobile and harder to retransform to CuS so it can cover longer distances. So we observe CuS far away from the corroded copper, even if CuS is immobile in principle. The corresponding effect on silver with diffusion of mobile silver oxide and a retransformation to immobile silver sulfide is not depending on humidity. Apart from that the mechanism is the same, but typically the silver sulfide forms sulfide needles and no flat corrosion layer.

ABSTRACT. For both microwave and power switching applications, Gallium Nitride (GaN) devices offer significant advantages with respect to their silicon and GaAs counterparts: high carrier mobility and carrier density, outstanding breakdown fields and the possibility of operating at very high temperature are reflected into the possibility of designing high efficiency and high frequency power amplifiers and power conversion systems. According to the targeted application and market, these devices are epitaxially grown on Si or SiC substrates, the option of GaN bulk substrates being still limited and expensive. Material defectivity, related with lattice mismatch between GaN and substrate, and the extremely high electric field values may cause potential reliability issues which are under intense investigation worldwide. This tutorial will review most recent works  concerning the study of defects-related parasitic effects and of physical failure mechanisms of GaN devices.

After a short overview on the reliability of GaN HEMTs for microwave applications, the analysis will focus on the characterization of deep level effects in enhancement- and depletion-mode power GaN devices for switching applications. Threshold voltage instabilities in MISHEMT structures and their dependence on dielectric properties will be reviewed. Subsequently, it will be shown how the extremely high electric field values may lead to time dependent breakdown phenomena, affecting not only dielectric layers but also the GaN semiconductor  itself. Recent data on the reliability of p-gate devices will be presented. Finally, breakdown mechanisms limiting the maximum device operating voltages will be reviewed.

ABSTRACT. This paper starts with a bibliographic survey about solder corrosion and experimental results of the corrosion on lead-free solder balls during salt spray tests. Focus is made on the SnAgCu solder alloy. Ball Grid Array assemblies and “Package on Package” components were put up to 96 hours in a salt spray chamber at 35°C with 5% sodium chloride (NaCl) aqua according to the ASTM B117-09 standard. The weight is measured during the test. The solder alloys are observed and analysed along the ageing with optical microscope and scanning electron microscope equipped with an energy-dispersive x-ray system. The solder alloy deterioration is visible after 48 hours. The microstructure is analysed in order to determine the corroded residues found on the surface solder balls after the salt spray test. Tin oxychloride (Sn(OH)Cl) is found on BGA solder joints after reflow and on PoP solder balls before reflow. The size of the solder balls has an influence on the corrosion state. Finally a method is developed in order to measure the corrosion product growth on the same sample during the salt environment exposure.

ABSTRACT. Semiconductor devices used in automotive applications undergo numerous stress situations depending on their particular application. Corrosion, as one main crucial failure mechanisms, can affect the lifetime of electronic components on system, device or even die level. In this paper, a novel corrosion mechanism on HALL sensor devices is investigated and clarified. This corrosion is only occurring under complex conditions like layout aspects, ionic impurities combined with humidity penetration and thermo-mechanical strain due to packaging and additional mechanical load from further over moulding. It is shown how advanced physical and chemical analysis can be combined with finite element simulation to ascertain a chemical degradation running on silicon, silicon dioxide and metallisation level to derive the complete chemical reaction mechanism for the observed corrosion defects. To verify the new failure mode, experiments to recreate this type of corrosion were carried out. Finally, conclusions are drawn on how failure modes can be prevented and how the robustness of the HALL devices under harsh environments can be increased.

ABSTRACT. The Highly Accelerated Stress Test (HAST) [130°C/85%RH or 110°C/85%RH with applied bias voltage] or Autoclave test [121°C/100%RH] are well-accepted tests during qualification and reliability testing of
automotive microelectronics. These tests are often preferred since results can be obtained relatively fast due to the high acceleration. On the other hand, there is a risk of accelerating non-relevant failure modes e.g. due to changes in material behavior under test conditions, which will not occur during application. However, predicting what happens under test conditions is not straightforward since one needs to understand material behavior under such extreme conditions. Especially the amount of water absorption, which i s highly relevant for test result interpretation, is challenging to obtain at temperatures above 100 °C, since here we deal with pressurized conditions.In this paper a novel, and straightforward, method is proposed to determine the moisture absorption under pressurized conditions. To verify the method, data obtained under pressurized conditions is compared to behavior under standard conditions. Under autoclave conditions it is shown that the moisture uptake at higher temperatures is much higher than predicted by extrapolation. The reported data can also be used to predict more reliably the moisture saturation level, and rate of moisture saturation during HAST.

ABSTRACT. In this paper, the effect of different laminate and solder mask surface morphology and composition on water film formation under humid and condensing conditions was investigated. Water film formation, its thickness, and the resulting electrical properties as a function of humidity levels and temperature conditions were evaluated. Thickness of the water layer under condensing conditions was measured as a function of sample cooling rates and compared to the resulting reduction in impedance. The dependency of water film formation on the surface chemistry and topography, and its influence on the changes of electrical signal as a function of different climatic conditions are described.

ABSTRACT. GaN-HEMT technology has been commercially available for several years and is a disruptive technology for high frequency RF power applications. GaN semiconductor offers wide band and high power capabilities thanks to its high saturation electron velocity, chemical stability and high breakdown voltage. GaN technology has been first developed and made available for base station applications for L-Band. Fierce competition does exist against well installed Si-LDMOS technology for saturated output power up to 1kW at frequencies below 4GHz. The landscape is more open for higher frequency bands as silicon devices have intrinsic physical limitations. Actually GaAs devices are the current existing solid-state competitor for high power microwave applications and occupy strong positions in various applications. GaN devices are allowing higher output powers, denser circuits and wider bandwidths. Products are coming in the market for Ka-Band applications. It is foreseen that circuits will be developed for up to 90GHz for applications such as E-Band data backhauling. Material and technological challenges will be presented with a particular focus on reliability aspects.

ABSTRACT. This paper reports an advanced time-domain methodology to investigate the device reliability and determine its Safe Operating Area of AlGaN/GaN HEMTs. The presented technique is based on the continued monitoring of the RF waveforms and DC parameters in order to assess the degradation of transistor characteristics in RF power amplifiers. The reliability study is carried out in class AB operation, under RF operating excitation at high drain voltages and overdrive conditions (12 dB compression). The analysis is carried out with two different output load impedances: optimum of PAE and mismatched impedance. The results show a drift of RF performances due to a variation of electrical parameters. In particular, the operation with optimum PAE load impedance induces slight positive threshold voltage shift. The operation with mismatched load shows a stronger degradation, with a positive threshold voltage shift and a drop in saturation drain current, due principally to the high temperature reached by the devices during RF stress.

ABSTRACT. GaN/AlGaN HEMT structures are observed to undergo a reversible, drastic change in the leakage current when covered with an additional polymer passivation layer. The polymer layer induces a stress on the HEMT structures, which initiates material migration processes and the formation of structural defects, influencing the electrical performance. Local strain measurements were performed in the semiconductor, at the critical HEMT gate electrode, to evaluate the impact of the stress on the Schottky gates. The strain distributions in the structures were measured with nanobeam electron diffraction from electron-transparent samples at cross sections and longitudinal sections at the positions of high leakage currents. A variation of the strain distribution underneath the gate electrode was detected in a cross-sectional sample. On the contrary, only minor differences in the strain values were measured in the longitudinal sections at different photoemission sites. Finally, localized metal interdiffusion was detected at the sites with the highest photoemission intensities.

ABSTRACT. Forensic failure analysis of automotive electronics deals in most cases with failures within the guarantee period. Frequently, specific operational conditions, even for a short moment, combine with specific electronic sensitivities – against ESD discharge, switching spikes, humidity ingress, vibration, undefined grounding circuitry. The paper lists impressive, partially curious examples of related failure anamnesis and analysis and tries to draw some important conclusions with respect to prevention and failure anamnesis/ failure analysis methodologies.

ABSTRACT. In the thin film transistors (TFTs) device research for foldable display, the degradation effect by the mechanical stress is crucial. Here, the crack position is critical for TFT reliability. However, it is difficult to characterize the crack position due to the random generation of the crack by mechanical stress. In this paper, the crack-guided low temperature polycrystalline silicon (LTPS) TFT test structures are fabricated and the crackguided effects on mechanical stress of the tested TFT structure are analyzed. To strain on the foldable LTPS TFTs, 50,000 cycles of tensile and parallel direction dynamic mechanical stresses were applied with 2.5-mm bending radius. Based on the results, the generating crack position can be guided and controlled and also TFT reliability for foldable display can be enhanced.

ABSTRACT. Prediction of failures induced during system level ESD stress is mainly related to the transient waveforms at chip level. To investigate hard and soft failures a precise modeling of the system is required. On-chip protection models can be obtained using quasi-static measurements. Even if such models can achieve good ESD simulations the impact of the external elements are more important. Paper deals with non-linear behaviors of the external elements related to the on-chip protections. Characterization techniques and models are presented, based on two types of capacitances, two different values, placed in parallel to on-chip protections. The paper shows the important variations of X7R capacitances during stresses that change the waveforms at the input of the chip. In measurements different behaviors are observed and reproduced by simulation. The methodology to build model and simulation will be presented.

ABSTRACT. The temperature is a critical parameter, for proper functioning of a system or a circuit, particularly in RF electronic devices. It considerable influence on reliability and performances; consequently plays an essential part in failure mechanisms and in lifetime. Recent studies have been focused in ElectroMagnetic Interferences (EMI) evolution after accelerated ageing tests and their effects on robustness behaviours (static, dynamic and RF). Even rarer to use RF devices in a power application.
This paper deals with the (EMI) evolution of conducted interferences in common and differential mode of RF LDMOS (Radio Frequency Lateral Diffused Metal–Oxide–Semiconductor) devices applied to a series chopper. In addition their influences on the electrical parameters are studied after various thermal accelerated ageing tests. The experimental results (spectre and waveform parameters) are presented and discussed. The obtained measurements have highlighted that there is a clear increase in the amplitude of resonances on the interference spectra after ageing. The evolution is not the same for all the parameters and for the different thermal tests. The shift is proportional to temperature. To reach a better understanding of the physical mechanisms of parameter’s shift after thermal tests, a numerical model (Silvaco-Atlas) was employed to confirm the degradation phenomena. Actually, the charge trapping in the gate oxide causes a decrease in the Miller capacity value (Crss), thereafter in turn a decrease in the disturbances level.

ABSTRACT. DC-link capacitors are a major factor of degrading reliability of power electric converters because they usually have a shorter lifetime and higher failure rate than those of semiconductor devices or magnetic devices. Characteristics of the capacitors are usually evaluated by a single sinusoidal current waveform. However, actual current flowing out of the converter into the capacitor is a modulated square current waveform. This paper provides experimental comparison of the power loss dissipated in an aluminium electrolytic capacitor between sinusoidal and square-wave current injections. Power loss is estimated by temperature rise of the capacitor. Experimental results confirms that power losses of the square-wave current injection were always lower than those of the sinusoidal current injection by 10-20%. Moreover, the power losses of the square-wave current injection can be estimated by a synthesis of fundamental and harmonic currents based on the Fourier series expansion, which brings a high accuracy less than 1% when more than fifth harmonic current is introduced. This comparison will be useful for estimating power loss and life time of electrolytic capacitors.

ABSTRACT. The typical via layout in CMOS technology with AlCu-metallizations and tungsten via is cylindrical. Common vias have a size as small as possible in the related process. More challenging application, temperature and mission profiles require higher robustness of a metallization [1, 2]. Via arrays of small common vias are in use to the transfer of higher currents [3]. But the typical via array layout is not the best layout for applications which are faced to high mechanical stress because via arrays metal layer connections make these parts in the stack inflexible. The developed so called highly robust metallization is optimized for applications with extended operating conditions regarding higher currents and temperatures as well as mechanical stress [4]. Donut-Vias are elements of the highly robust metallization for the interconnection of highly robust metal lines. The paper shows the layout of a Donut-Via and explains the benefits and limits of the new layout by simulation and test results.

ABSTRACT. Silicon based semiconductor devices are stressed during fabrication, handling and packaging with significant thermal and mechanical loadings. In worst cases, these induced loadings can cause initial chip damage leading to electrical failure or fracture of the Si-die during further process steps or application. In order to evaluate the risk of pre-damage during assembly, a case study of potential failure modes taking pick-and-place processes into account was performed. Therefore, pre-damaged samples using a misaligned pick-and-place setup were generated. Afterwards, methods of microstructural crack analyses and mechanical strength testing were applied to evaluate the damage impact of the generated needle imprint. In addition, finite element analyses in combination with fracture mechanical approaches were combined to evaluate the failure probability of Si-dies during the following assembly or thermal cycling steps. As a result of this study, critical process steps during chip assembly can be identified and critical tolerance limits of the process can be evaluated to achieve an acceptable reliability level. Consequently, the risk of failure caused by handling or assembly issues can be estimated and appropriate steps for quality assurance procedures can be defined.

ABSTRACT. A mechanical testing setup was developed to study the fatigue response of fine thermo-sonic wire bond connection in low profile quad flat packages (LQFP). The testing set-up was designed to induce pre-defined multiaxial stresses in the wire bond loops of non-encapsulated packages in order to mimic their deformation behavior during the thermo-mechanical loading. Lifetime curves were obtained up to 1.0e7 loading cycles with fatigue failure occurring in the heat affected zone of the ball bond. The experimental fatigue data in combination with extended FEA provided the basis for a Coffin Manson lifetime model. The proposed fatigue testing procedure can be applied as a highly efficient method for evaluation of various wire bonded packages by using a limited number of test samples and simultaneous testing of several wire bonds.

ABSTRACT. A new measurement method for mechanical stresses with microscopic and sub-microscopic spatial resolution is presented. It bases on classical stress relief techniques in experimental mechanics, as for example the familiar hole drilling method. Applicability of the classic method for micro and nano size objects was achieved, using very local stress relief caused by ion milling inside commercial FIB equipment and image correlation algorithms for the determination of corresponding relaxation strains. Approximately 10 years ago, first publications demonstrated the principal feasibility of the approach. Now, this work gives a more detailed view on different measurement variations, their capabilities and limitations. The paper reports on the effort made for qualifying the new method for use under real industrial conditions, which includes validation of techniques, best practice based choice of tools and sufficient automation of the measurement process. Finally an application example from 3D integration in electronics demonstrates practical benefit obtained by the method.
 

ABSTRACT. Organic passivation layers are used as coatings in semiconductor devices for protection of metallization films against a variety of environmental effects. Polyimides (PI) have been used successfully as conformable protection layers on aluminium and also recently on copper metallization. While adhesion properties of Cu interconnects to compliant polymer substrates have been investigated so far, studies on PI/Cu passivation layers are scarce. In this study the adhesion strength of polyimide passivation layer to Cu film stacks on Si has been studied by using different fracture mechanic methods including four point bending, double cantilever beam and single lap shear tests. The focus is investigation of the dependency of the critical energy release rate to the mode mixity obtained by different testing techniques and evaluation of the delamination data using analytical models and by means of FEA and cohesive zone modelling.

ABSTRACT. This paper investigates the robustness of normally-off High Electron Mobility Transistors (HEMTs) with p-GaN gate submitted to forward gate bias overstress. By means of combined DC and spectral analysis we demonstrate the following results: (i) the devices demonstrate a time-dependent failure mechanism; (ii) time to failure (TTF) can be described by a Weibull distribution with a shape factor higher than 1, suggesting a wear-out failure; (iii) the devices have an estimated 20-years lifetime for a gate voltage of 7.2V; (iv) TTF is temperature-dependent, with an activation energy of 0.5 eV; (v) emission microscopy reveals the presence of hot spots, whose emission originates from yellow luminescence and/or hot electron radiation.

ABSTRACT. This paper reports the withstanding capability of unclamped inductive switching (UIS) of high voltage GaNHEMTs as a function of the gate voltage in the off-state. One of the critical disadvantages of GaN-HEMTs is its lack of the UIS withstanding capability because of the non-removable structure of holes, which are generated by the avalanche breakdown. Therefore, a p-type GaN gate structure is attractive not only for normally-off operation but also for the UIS withstanding capability design from the viewpoint of hole-removal. This paper shows the results of the UIS test for GaN-HEMTs with the p-type gate structure. The UIS withstanding capability of GaN HEMTs can be designed via the hole removal structure and the package thermal resistance.

ABSTRACT. Enhancement-mode GaN-on-Si HFETs for power switching application are investigated under fast switching and elevated ambient temperatures conditions. The switching characteristics are used to evaluate the dynamic ON-state resistance at temperatures up to 175°C, while switching drain voltage up to 400 V. The devices show a low increase of less than 25% in dynamic resistance when increasing the ambient temperature up to 125°C. However, differing from expectations, above this temperature a rapid increase of ON-resistance up to 85% occurs. Such anomaly indicates the existence of thermally activated trapping processes. Trapping transients taken over a large temperature range and a wide range of OFF-state stressing time show that in parallel to the buffer trapping, with activation energy of 0.80 ±0.02 eV, an additional de-trapping process with activation energy of 0.42 ±0.05 eV occurs through increased leakage current over the temperature.

ABSTRACT. This paper presents experimental robustness of 600 V GaN High Electron Mobility Transistors (HEMT) submitted to Short-Circuits (SC) operation modes. A dedicated secured test bench has been developed and designed in order to protect as quickly as possible the Device Under Test (DUT) after failure. Some devices featured a great robustness under SC and were able to support several SC of a very long duration. On the contrary, others failed immediately at the first pulse, for a low dissipated energy. The obtained results reveal a severe dispersal in terms of SC robustness for these new emerging components. Gate behavior has been also studied, showing a leakage current during each SC, destructive or not. A part of the paper is also dedicated to the study of the effects of case temperature and DC voltage on robustness.

ABSTRACT. A new technique for local deep level transient spectroscopy imaging using super-higherorder scanning nonlinear dielectric microscopy is proposed. Using this technique, SiO2/SiC structure samples with different post oxidation annealing conditions were measured. We observed that the local DLTS signal decreases with post oxidation annealing (POA), which agrees with the well-known phenomena that POA reduces trap density. Furthermore, obtained local DLTS images had dark and bright areas, which is considered to show the trap distribution at/near SiO2/SiC interface.

ABSTRACT. The power cycle reliability of Cu nanoparticle joints between Al2O3 heater chips and different heat sinks (Cu- 40wt.%Mo, Al-45wt.%SiC and pure Cu) was studied to explore the effect of varying the mismatch in the coefficient of thermal expansion (CTE) between the heater chip and the heat sink from 4.9 to 10.3 ppm/K. These joints were prepared under a hydrogen atmosphere by thermal treatment at 250, 300 and 350 °C using a pressure of 1 MPa, and all remained intact after 3000 cycles of 65/200 °C and 65/250 °C when the CTE mismatch was less than 7.3 ppm/K, despite vertical cracks forming in the sintered Cu. When the CTE mismatch was 10.3 ppm/K, the Cu nanoparticle joint created at 300 °C endured the power cycle tests, but the joint created at 250 °C broke by lateral cracks in the sintered Cu after 1000 cycles of 65/200 °C. The Cu nanoparticle joint created at 350 °C also broke by vertical cracks in the heater chip after 1000 cycles of 65/250 °C, suggesting that although sintered Cu can be strengthened to tolerate the stress by increasing the joint temperature, this eventually causes the weak and brittle chip to fracture through accumulated stress. The calculation results of stresses on the heater chip showed that the stress can be higher than the strength of Al2O3 when the CTE mismatch is 10.3 ppm/K and the Young’s modulus of the sintered Cu is higher than 20 GPa, suggesting that the heater chip can be broken.

ABSTRACT. The electrical instability in amorphous InGaZnO (IGZO) thin film transistors has been investigated for different doping types and concentrations of silicon bottom-gates. The gate current (IG) was measured to prove that the threshold voltage shifts (ΔVTH) were due to electron and hole trapped charges under positive and negative gate stress, respectively. After the gate stress, the ΔVTH in IGZO transistors depend on the work function of the silicon gates. The ΔVTH listed in order of magnitude are ΔVTH-n+=gate>ΔVTH-n-gate>ΔVTH-p-gate>ΔVTH-p+-gate after a positive gate stress and a positive thermal illumination stress, but this is reversed after a negative gate stress and a negative thermal illumination stress. The more significant ΔVTH after a negative thermal illumination stress than after positive thermal illumination stress may be attributed to the low-level injection under light illumination. To minimize ΔVTH in IGZO transistor with a silicon bottom-gate, a low-doped gate is recommended.

ABSTRACT. The investigations on the device instabilities of a-InGaZnO thin film transistors with transparent source and drain have been performed according to the different thermal annealing treatment after positive gate bias stress (PBS) and hot carrier stress. The controlled devices with a rapid thermal processing (RTP) treatment in addition to conventional thermal annealing showed less degradation after PBS and hot carrier stress at the same stress biases. The reason for lower device degradation could be explained by the higher effective barrier energy which may be resulting from oxygen outdiffusion. However, the controlled device showed more serious degradation at the same actual stress voltages to the intrinsic part of device. This result may be attributed to the increased channel electron concentrations which were resulted from the increased oxygen vacancies. The degradation of the controlled devices was more serious after hot carrier stress than after PBS. From C-V measurement and transfer characteristics in forward and reverse mode measurements, hot carrier induced degradation could be attributed to the interface state generation and the electron trappings at interface between the active channel layer and the gate dielectric layer.

ABSTRACT. The investigations on the device instabilities in amorphous InGaZnO TFTs with metal (Ni) and transparent (ITO and InGaZnO) source and drain electrodes have been performed under negative bias stress (NBS), negative bias thermal stress (NBTS), negative bias illumination stress (NBIS) and negative bias thermal and illumination stress (NBTIS). From the measured device parameters in dark and under illumination conditions, a-IGZO TFTs with InGaZnO source and drain show an excellent device performances and lower device degradation than the devices with Ni and ITO source and drain under NBS and NBTS. However, amorphous IGZO TFTs with InGaZnO source and drain electrodes show more significant device degradation under NBIS and NBTIS. In order to explain our experimental results, we propose that the center responsible for the device instability is the processrelated defects under NBS and NBTS, and the oxygen vacancy under NBIS and NBTIS, respectively.

ABSTRACT. The reliability of RF AlGaN/GaN HEMT devices on SiC substrate is investigated here in pulsed RF condition at nominal and maximum rating drain quiescent bias. During these 3500 hours tests, high voltage especially during the RF pulse leads to a progressive decrease in gm and IDS S while trap concentration increases. These evolutions may be attributed to trap generation by hot carrier injection and highlight the importance of drain quiescent voltage as an important acceleration factor for this technology’s reliability in pulsed RF conditions.

ABSTRACT. The need for a novel multi-scale ESD (ElectroStatic Discharge) network recognition and verification methodology is described in this paper. The proposed solution is used to limit the risk of ESD design errors and to enhance IC reliability, independently of the implemented ESD protection strategy and the type of package assembly technique. This method relies on a topology-aware & graph-based verification paradigm which is generic enough to be usable at every step of the design flow. Its efficiency is illustrated with examples involving custom I/O ring portions in 28nm UTBB FD-SOI High-K metal gate technology.

ABSTRACT. Degradation mechanism of foldable thin film transistors (TFTs) is investigated experimentally by electrical, mechanical and electrical-mechanical hybrid stress experiments. Mechanical and electrical stress environment was set for foldable TFTs and the degradation effect according to the applied stress is investigated and analyzed. Degradation mechanism model that can explain the defect generation is suggested to explain the result of electrical-mechanical hybrid stress experiment.

ABSTRACT. The collected system information is critical for Condition Monitoring (CM) which is mainly implemented by utilizing various types of sensors. Hence, the reliability of sensors directly influences the evaluation result of CM. One type of data-driven framework to enhance sensor reliability is realized in this article. To be specific, the combination of sensor selection method and data anomaly detection is achieved by information theory and Kernel Principle Component Analysis (KPCA). The sensors which can provide more valuable information for system CM are selected. The correlations among sensors are analysed by mutual information. Finally, the data anomaly detection is conducted by utilizing the correlations among sensor data sets and KPCA. The effectiveness is proved by employing sensor data sets from National Aeronautics and Space Administration Ames Research Center.

ABSTRACT. The present paper aims to provide a better approach on the analysis of pull-up  capacitancevoltage characteristic of MEMS capacitive switches by introducing an analytical model that takes into account the case of a real device, where the charge is not uniformly distributed at the surface of the dielectric film and the capacitor armatures are not parallel. The proposed model allows the use of capacitance-voltage characteristic’s derivative, which slope is directly related to the device mechanical characteristics and the stress induced during charging. The application of the model on a MEMS switch with asymmetric capacitance-voltage characteristic and on a switch with a parabolic up-state capacitance-voltage characteristic during charging and discharging processes allows the draw of some initial conclusions on the charging and the mechanical performance of the devices. Further investigation is in progress in order to extract important information on the device degradation.

ABSTRACT. We have investigated the influence of the two-dimensional electron gas (2DEG) in AlGaN/GaN high electron mobility transistors (HEMTs) on their reliability under ON-state conditions. Devices stressed in the ONstate showed a faster decrease in the maximum drain current (IDmax) compared to identical devices stressed in the OFF-state with a comparable electric field and temperature. Scanning electron microscope (SEM) images of ON-state stressed devices showed pit formation at locations away from the gate-edge in the drain-gate access region. Cross-sectional transmission electron microscope (TEM) images also showed dark features at the AlGaN/SiN interface away from the gate edge. Electron energy loss spectroscopy (EELS) analysis of the dark features indicated the presence of gallium, aluminum and oxygen. These dark features correlate with pits observed in the SEM micrographs. It is proposed that in addition to causing joule heating, energetic electrons in the 2D electron gas contribute to device degradation by promoting electrochemical oxidation of the AlGaN.

ABSTRACT. In this paper we report on investigations of the effect of structural disturbances in GaN HEMT layer stacks on the electrical characteristic. It will be shown that one can clearly resolve vertically highly conductive leakage paths corresponding to threading dislocations which terminate at the surface of the topmost epitaxial layer. Moreover there is evidence that different types of dislocations do have different electrical properties relevant for the electrical performance of devices. This fact motivates the preference of specific growth technologies hampering the most deleterious types of dislocations.

ABSTRACT. Nowadays system reliability performance represents a key issue and being reliable become a fundamental requirement of products in many manufacturing fields. The paper is focused on the reliability improvement of fault tolerant complex systems using component Reliability Importance (RI) procedures in order to assess the impact of each component on the overall system reliability. This study is focused on RI assessment during design stage with the aim of optimizing engineers’ efforts and focusing on components with the greatest effect on the whole system. The first part of the paper focuses on a particular Reliability Importance measure, the Credible Improvement Potential (CIP), which is the most suitable RI metric for our purpose. The Reliability Importance assessment on a dedicated case study based on fault tolerant complex system is then proposed and results are discussed in detail.

ABSTRACT. In this paper, a novel fatigue life prediction model for electronic components under non-Gaussian random vibration excitations is proposed based on random vibration and fatigue theory. This mathematical model comprehensively associates the vibration fatigue life of electronic components, the characteristics of vibration excitations (such as the root mean square, power spectral density, spectral bandwidth and kurtosis value) and the dynamic transfer characteristics of electronic assembly (such as the natural frequency and damping ratio) together. Meanwhile a detailed solving method was also presented for determining the unknown parameters in the model. To verify the model, a series of random vibration fatigue accelerated testing were conducted. The results obtained show that the predicted fatigue life based on the model agreed with actual testing. This fatigue life prediction model can be used for the quantitative design of vibration fatigue accelerated testing, which can be applied to assess the long-term fatigue reliability of electronic components under Gaussian and non-Gaussian random vibration environment.

ABSTRACT. The system reliability depends heavily on the sensed condition data which are mainly collected by various types of sensors. The missing or faulty condition data can result in wrong decision-making or lead to system fault. To realize data integrity for system condition monitoring, one data-driven framework for recovering condition data is proposed in this article. The proposed model is combined by mutual information and Multivariable Linear Regression (MLR). The correlations among condition monitoring data sets are firstly analysed by mutual information. Then, MLR is utilized to recover condition monitoring data. A case study of aircraft engine condition monitoring data sets which are offered by National Aeronautics and Space Administration Ames Research Center is carried out to evaluate the performance of the data-driven framework.

ABSTRACT. This work presents a solution for radiation hardness assessment using compact and productive X-ray facilities, as well as the automated measurement system. The radiation test procedure can be integrated
in commercial IC’s process as a mandatory option for providing high reliability and radiation hardened IC projects. Using the radiation test procedure as a one of technology stage, the assessment of total ionizing dose (TID) hardness was done for test structures, which were fabricated in conventional 65nm CMOS technology.

ABSTRACT. This paper deals about a lithium battery capacity aging model based on Dakin’s degradation approach. A 15 Ah commercial lithium-ion battery based on graphite/iron-phosphate technology was used for this purpose and aged at nine different conditions. In fact, the effect on aging of temperature (30, 45, and 60°C) and battery state of charge (30, 65, and 100 %) is studied. The Dakin’s degradation approach based on chemical kinetics is used to establish the battery aging law. The aging rate expression is then deduced and found equivalent to Eyring’s law. The aging rate increases exponentially with rising temperature and SOC. Model simulation is compared with experiment, literature and results are discussed.

ABSTRACT. Step-stress experiments are performed to investigate reliability assessment of ultra-short gate AlGaN/GaN high electron mobility transistor (HEMT) on Si substrate. A methodology based on a sequence of step stress tests has been defined for in-situ diagnosis of permanent degradation. The same stress conditions were applied on HEMTs with different geometries. It is found no evolution of the drain current during non stressful steps. The value of the critical degradation voltage beyond which the stress drain current starts to decrease significantly is also found dependent on the stress bias conditions, the gate-drain distance and the gate length.

ABSTRACT. Electronic control units (ECUs) are widely spread over the automotive industry with lots of applications. At this time more than 100 ECUs are used in a medium-sized vehicle. Development, test and qualification of ECUs are time and cost extensive. That is why they are often used in more than one generation and more than one model of vehicles. Present ECUs are developed and qualified for vehicles with combustion engines. Since the introduction of hybrid and fully electrical cars the requirements on the ECUs changed drastically. With respect to the engine ECUs temperature maxima is lower. On the other hand due to charging the batteries and other continuous voltage stresses, the time of operation (active and passive) is massively growing. The central question is: Is it possible to use ECUs qualified for gasoline car in electric cars without any reliability risks? To answer this question we start with a comparison of mission profiles of electrical cars and combustion engine cars. Based on the mission profiles we show the different requirements on the electronics robustness and use time. Afterwards we investigate the qualification process of an exemplary ECU from a combustion engine car and identify differences in comparison to the hybrid and fully electrical variant. As an example, a measurement of temperatures in a car driven under reasonably realistic conditions indicates the influence of the combustion engine on the thermal behaviour of the electronics as a key driver for failures. We provide a generic procedure that can be used for the design of future ECUs and compare it with expected temperature distributions in electric cars. Based on our results recommendations for the applicability of the use of existing ECUs in electric cars are discussed.