Redundant elements in memory are used to enhance the manufacturing yield of silicon devices. Although redundant elements allocated during manufacturing tests are fully tested, unallocated elements remain untested. To increase reliability, all redundant elements must be tested during manufacturing. This paper presents the hardware architecture and manufacturing test flow required to systematically test all redundant row elements and permanently identify defective ones. This ensures that only reliable unallocated spare elements remain available for in-system repair. Experimental results show that the proposed solution can be integrated into existing memory built-in self-test solutions with minimal impact on area and test time.