This paper describes two popular approaches for usage of a code written in C language in functional verification process. Those approaches are integration of C model using DPI-C System Verilog function and usage of static and pre-generated in/out C model value tables. The paper gives details about their implementations and compares their performance through a case study set on an example design. It also gives comparative analysis between these two approaches in terms of effort, range of suitability for different design cases, reusability and integrability.