The Cal Poly CubeSat Laboratory (“PolySat”) is an undergraduate, student-operated CubeSat laboratory based at Cal Poly, San Luis Obispo. Since 2010, the lab has developed and maintained a custom avionics system based on an ARM9 microprocessor (MPU) that is still used today for its exceptionally low power consumption and small volume.

Today, however, the compute demands of payloads are only increasing. Consequently, the lab has had to add coprocessors. This trend, combined with the growing issue of component obsolescence, necessitates the design of a system based around a modern, more performant MPU.

A key realization is that extra compute is not necessary at all times. Only during compute heavy operations like attitude determination is it beneficial. An ideal solution, then, would be an architecture that can disable power to unneeded compute resources while maintaining a sufficient minimum level of operation.

This presentation documents PolySat’s investigation into novel avionics that leverages the two core heterogenous architecture of NXP’s i.MX 7ULP system-on-a-chip (SoC) as this solution. This SoC can power gate the A7 core when extra compute is not needed. Recent measurements suggest this technique may reduce idle power use by up over 50% compared to the lab’s existing architecture. Measurements also show that, even with both cores on, there is still a substantial performance-per-energy gain of 2.35 times CoreMarks/Joule over the existing architecture. This suggests shorter run-times and power-gating can compensate for the energy usage from running high-intensity tasks on the A7 core.

These findings justify the lab’s ongoing investigation into a space-worthy architecture that leverages both power-saving features and added capabilities like hardware floating point and SIMD vectorization. With these advances, the lab will be better equipped to handle the advanced ADCS and software needs of missions today and tomorrow.