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![]() Title:The Role SLT Plays at Intel Conference:ITC 2025 Tags:ATE, CLASS, DPM, HSIO, HVM, Marginal Defects, Silent Data Corruption, SLT, SORT and System Test Abstract: Abstract—SLT has been a mainstay at Intel for several generations of products across all segments. In this poster, we discuss the need for SLT by detailing the challenges driven by marginal faults, provide an insight into the building blocks of our architecture, briefly discuss several tester configurations, highlight its significance with data from Intel products, and finally layout future opportunities and potential directions being explored. | ||||
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