Redundant elements in memories are used to enhance the manufacturing yield of silicon devices. Although redundant elements allocated during manufacturing tests are fully tested, unallocated elements remain untested. To increase device reliability, allocation of memory spares during in-field testing may become necessary throughout the lifecycle of a device. In other words, all redundant elements must be tested during manufacturing to avoid using defective spare in the field. This paper presents a novel hardware architecture and manufacturing test flow to systematically test all redundant row elements and preemptively identify defective ones. This solution ensures that only reliable unallocated spare elements remain available for in-system repair.