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![]() Title:Cascade SBC with Microchip PIC-64 for IEEE 802.1DP TSN Ethernet Authors:Mark Broadbent Conference:SMC-IT/SCC 2025 Tags:AI, High-Performance Spaceflight Computing, HPSC, ML, Networking, Payload, SBC, Security, Single board computer, Software, Spacecraft and TSN Ethernet Abstract: Introduction: Modern space missions are requiring increased processing reliability while providing increased security with higher autonomy and on-board processing capabilities. To accomplish this, high performance computers that can operate in harsh space environments (vibration, thermal, and radiation) are required. The presentation will discuss board development for the High-Performance Spaceflight Computing (HPSC) processor single board computer (SBC) architecture design and trades made during the development of a HPSC SBC for space applications. This will include an update on the development. TSN Ethernet Applications. Topics of Interest: Rad Hard Space Processor Design, Space Avionics Solutions, in orbit and spacecraft networking, ML and AI, and TSN Ethernet Cascade SBC with Microchip PIC-64 for IEEE 802.1DP TSN Ethernet ![]() Cascade SBC with Microchip PIC-64 for IEEE 802.1DP TSN Ethernet | ||||
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