Days: Monday, December 16th Tuesday, December 17th
View this program: with abstractssession overviewtalk overview
Registration & Breakfast (Sponsored by Vaire Computing: vaire.co)
IRDS @ ICRC:Regional Greetings
- Enrico Sangiorgi, Francis Balestra, Yoshiro Hayashi, and Tom Conte
IRDS @ ICRC:The Dawn of the New Electronics Industry
- Paolo Gargini
Located in Amici (4th floor)
IRDS @ ICRC:Beyond CMOS and Emerging Materials Integration (EMI)
- Shamik Das and Joe Hagmann
ICRC 2024: Welcome!
- Joseph Friedman & Christopher Bennett
ICRC Technical Session 1: Novel Methods for In-memory Computing
11:10 | Compressed vector-matrix multiplication for Memristor-based ensemble neural networks (abstract) |
11:30 | Forward-Forward Learning on RRAM: Algorithm and Low-Voltage Reset Co-Optimization (abstract) |
11:40 | HiAER-Spike: Hardware-Software Co-Design for Large-Scale Reconfigurable Event-Driven Neuromorphic Computing (abstract) |
12:00 | StoX-Net: Stochastic Processing of Partial Sums for Efficient In-Memory Computing DNN Accelerators (abstract) PRESENTER: Ethan G. Rogers |
Above Ash (16th floor)
Special Session: New Frontiers in Neuromorphic Computing- How Can we Compute, and at What Scales?
13:35 | Alternative ways of computing: what computes, what doesn't? (abstract) |
14:00 | Reliable Deep Learning Inference: From Hardware to Systems (abstract) |
14:25 | Emerging Computing Technologies for Advanced Scientific Computing Research (abstract) |
14:50 | Developing Platforms for AI Research and Beyond (abstract) |
Located in Amici (4th floor)
ICRC Technical Session 2: Ising Machines & Optimization with Emerging Devices
15:25 | Towards High-Order Ising Machine Accelerators and SAT solvers with In-Memory Computing (abstract) |
15:35 | Gradient matching of higher order combinatorial optimization in quadratic Ising machines (abstract) PRESENTER: Dmitrii Dobrynin |
15:55 | Architectural Considerations for Scalable Analog Ising Machines (abstract) PRESENTER: Pranav Mathews |
16:15 | Optimization of Magnetic Tunneling Junction Devices for Neuromorphic Circuits for Solving MAXCUT (abstract) |
Located in Amici (4th floor)
ICRC Technical Session 3: Reservoir & Stochastic Computing
16:50 | Physical reservoir computing on discrete analog CMOS circuits and its application to real data analysis and prediction (abstract) |
17:00 | Computing with a Chemical Reservoir (abstract) |
17:20 | Accelerating PDEs with Chiplet-Based Processing Chains (abstract) |
17:40 | Thermodynamic Bayesian Inference (abstract) PRESENTER: Maxwell Aifer |
Poster Session & Happy Hour
Confirmed Poster Participants:
- “Accurate and Efficient Reservoir Computing with a Multifunctional Proton-Copper ECRAM”, Caroline Smith, ASU, Tempe AZ, USA
- "SPICEPilot: Navigating SPICE Code Generation and Simulation with AI Guidance," , Deepak Vungalara , New Jersey Institute of Technology, New Jersey, USA
- “An Efficient Convolutional Neural Network Analog Architecture,” Jennifer Hasler, Georgia Tech, Atlanta, GA, USA
- “Compressed vector-matrix multiplication for Memristor-based ensemble neural networks”, Phan Ahn Vu, CEA List, Univ. Grenoble, Grenoble, France
- "HiAER-Spike: Hardware-Software Co-Design for Large-Scale Reconfigurable Event-Driven Neuromorphic Computing", Omowuyi Olajide, University of California, San Diego, CA, USA
- "Physical reservoir computing on discrete analog CMOS circuits and its application to real data analysis and prediction", Shimon Matsuno, Hokkaido University, Japan
- "Accelerating PageRank Algorithmic Tasks with a New Programmable Hardware Architecture", Rownak Chowdhury, University of Missouri-Kansas City, Kansas City, MO, USA
- "Forward-Forward Learning on RRAM: Algorithm and Low-Voltage Reset Co-Optimization", Adrien Renaudineau, Universite Paris-Saclay, Paris, France
- "Filament-Free Bulk RRAM with High Endurance and Long Retention for Few-Shot Learning On-Chip", Yucheng Zhou, Department of NanoEngineering, University of California, San Diego, CA, USA
View this program: with abstractssession overviewtalk overview
ICRC Technical Session 4: Exploiting Emerging Devices for Complex Logic
08:30 | Development of power clock MEMs for applications in reversible quasi-adiabatic logic (abstract) |
08:40 | Thermodynamic Algorithms for Quadratic Programming (abstract) |
09:00 | Hyperdimensional Computing Provides Computational Paradigms for Oscillatory Systems (abstract) |
09:20 | Exploration of the viability of TiN/TiOX ReRAM in Computational Random-Access Memory (CRAM) (abstract) |
Located in Amici (4th floor)
ICRC Technical Session 5:Emerging Devices for Scalable Computing
09:55 | A Hybrid RRAM-CMOS Platform for Prototyping Digital and Analog Projects (abstract) |
10:05 | Evaluation of Ferroelectric Devices for Neuromorphic Applications (abstract) |
10:25 | Accurate and Efficient Reservoir Computing with a Multifunctional Proton-Copper ECRAM (abstract) PRESENTER: Caroline Smith |
10:35 | Scalable Spintronic Synapses for Analog In-Memory Computing Based on Exchange-Coupled Nanostructures (abstract) |
Located in Amici (4th floor)
ICRC Technical Session 6:Temporal & Spiking Neuromorphic Systems
11:05 | Mixed Delay/Nondelay Embeddings Based Neuromorphic Computing with Patterned Nanomagnet Arrays (abstract) |
11:25 | A Configurable CPG Controller using Connectome based SNN on FPGA for Robot Locomotion (abstract) |
11:45 | Encoding Numbers with Graded Spikes (abstract) |
12:05 | Harnessing Dendritic Computation for Neuromorphic Architectures (Invited) (abstract) |
12:25 | The RISP Neuroprocessor - Open Source Support for Embedded Neuromorphic Computing (abstract) |
Above Ash (16th floor)
Keynote
13:45 | Diffusive and drift memristors for neuromorphic and analog computing (abstract) |
Located in Amici (4th floor)
ICRC Technical Session 7:New Frontiers in Quantum Computing
14:55 | Superconnectors: A Latency Insensitive Approach to SFQ Design (abstract) |
15:15 | Neural Network Enhanced Robustness for Noisy Quantum Applications (abstract) |
15:35 | The Dilemma of Random Parameter Initialization and Barren Plateaus in Variational Quantum Algorithms (abstract) PRESENTER: Muhammad Kashif |
15:55 | COMPASS: Compiler Pass SelectionFor Improving Fidelity Of NISQ Applications (abstract) PRESENTER: Siddharth Dangwal |
Located in Amici (4th floor)
ICRC Technical Session 8: New Designs for Hardware Accelerators
16:25 | PRACO: A Photonic Residue-Number Architecture Support for Collective Operations (abstract) PRESENTER: Jiaxin Peng |
16:45 | Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture (abstract) |
17:05 | SPICEPilot: Navigating SPICE Code Generation and Simulation with AI Guidance (abstract) |
17:25 | Mixture of Experts with Mixture of Precisions for Tuning Quality of Service (abstract) |
Tutorial: Cryogenic Computing
18:15 | Making CMOS Cool Again – Cryogenic CMOS for High Performance Computing (abstract) |