ABSTRACT. Serving large language models is increasingly limited not only by model accuracy, but also by the time, memory, energy, and communication cost of each inference request. Parallel inference can reduce this cost, but it becomes difficult when the available machines are small, heterogeneous, and shared with other workloads. Edge deployments are often built from devices that differ in compute speed, memory capacity, storage space, energy behavior, and network quality. These edge constraints make full-model placement on every worker device impractical in many settings, and make static partitions sensitive to background load and transient device pressure. This paper presents an adaptive runtime for distributed transformer inference on heterogeneous edge clusters. The runtime selects execution plans at request boundaries, using offline profiles, live metrics, activation transfer estimates, energy observations when available, and feedback from previous requests. It supports static partitioning, dynamic proportional partitioning, and dynamic proportional partitioning with ranked alternative paths that can be used when the primary route is occupied. We evaluate the approach with TinyLlama as a controlled workload on a physical heterogeneous cluster. The evaluation focuses on stream makespan, energy efficiency, resource pressure, and behavior when devices become unavailable. The study characterizes the regime where partitioned serving is required: capacity-constrained edge clusters where worker devices contribute shards of the model.

ABSTRACT. Automatic differentiation is an important code transformation to compute sensitivities of mathematical functions given in the form of computer programs. It is widely used in data-intensive computing, including machine learning frameworks. We address the particular challenge of parallelizing automatic differentiation. More precisely, we consider the situation where a program using a shared-memory parallelization strategy is transformed by automatic differentiation using a different strategy to parallelize its derivative statements. The challenge lies in bringing together two separate parallelization strategies without sacrificing the performance of the automatically generated code. The pros and cons when merging these strategies are analyzed, providing an illustrative example of performance engineering for data-intensive computing.

ABSTRACT. This paper presents a systematic evaluation of MPI communication schemes for halo exchanges in stencil-based, distributed Sparse Matrix–Vector Multiplication (SpMV). We incorporate MPI-4 communication primitives into the YYYY library and conduct a comparative analysis of three distinct strategies: non-blocking point-to-point communication, neighborhood collective operations, and persistent neighborhood collective operations. We test a synthetic 3D seven-point stencil and the Geo\_1438 matrix from SuiteSparse on MareNostrum 5, using up to 640 MPI tasks across 8 nodes, including GPU offloading with CUDA-aware MPI. We show that persistent neighborhood collectives amortize setup costs across iterations and reach near--steady-state performance from the first exchange. For Geo\_1438, the persistent scheme achieves up to 2.38$\times$ speedup over the baseline at 640 tasks, and in a full Preconditioned Conjugate Gradient solver it reduces total solve time by about 7\%. Overall, persistent neighbor\-hood collectives with topology-aware aggregation emerge as the most robust and scalable communication strategy for stencil-based distributed SpMV on exascale systems.

ABSTRACT. The growing deployment of Vision-Language Models (VLMs) at the edge raises important challenges in balancing energy consumption, latency, and inference quality. While cloud-hosted VLMs provide high prediction accuracy, they incur communication overhead and higher energy costs, whereas edge execution offers lower latency but is constrained by limited computational resources. Moreover, the energy required for inference depends on the complexity of both visual inputs and user queries, making static execution policies inefficient. We present a lightweight energy-aware routing framework for two-tier edge-cloud multimodal inference. INAR-VL leverages lightweight image and text complexity indicators to adaptively select the execution location and VLM, processing simple requests locally while offloading only energy-intensive or reasoning-intensive cases to the cloud.

ABSTRACT. The Compute Continuum is reshaping how applications are deployed and executed across edge, fog, and cloud resources. Critical applications, however, require Quality of Service guarantees — bounded latency, reliability, and predictability — that must be preserved despite the heterogeneity and dynamism of the underlying infrastructure. Delivering such guarantees across the continuum remains a work in progress: research has produced effective solutions for QoS-aware orchestration and energy-efficient resource management, yet current implementations still fall short of end-to-end guarantees. This keynote will review recent research on introducing QoS support at scale in the continuum. Starting from example use-cases in e-health and industrial automation, the talk will first examine the progress made and the gap that still separates it from practice. It will then discuss how emerging classes of applications, such as pervasive AI agents, are set to raise the bar even further, analyzing the challenges this poses for jointly managing computing and networking resources across the continuum.

ABSTRACT. This presentation introduces Ocean, an HPC software stack used within the EUPEX project to support the deployment and administration of HPC systems. The talk will highlight how Ocean helps integrate and manage software components in a reproducible distribution, and will present the tools used to build, maintain, and contribute to the stack.

ABSTRACT. Modular supercomputers combine compute, accelerator, and I/O resources by integrating this heterogeneity at the system level. This creates new challenges for efficient resource management, communication, and application execution. ParaStation MPI is a modularity-aware execution environment and runtime designed to address these challenges at scale and is a core component of the EUPEX software stack.

This talk presents recent advances in ParaStation MPI, focusing on scalable startup and MPI Remote Memory Access (RMA). We discuss a hierarchical runtime initialisation approach that enables efficient startup of large-scale MPI applications on modular systems, reducing overhead and improving scalability. We also present optimisations for RMA communication that exploit hardware support to accelerate one-sided communication operations.

The talk further highlights the integration of ParaStation MPI within the EUPEX software ecosystem, including support for accelerator resources, device-to-device communication, and modularity-aware communication optimisations. Together, these capabilities establish ParaStation MPI as a key runtime technology for future modular supercomputers, providing the scalability, performance, and flexibility required by next-generation HPC applications.

ABSTRACT. We present PRG32, an open-source educational runtime for RISC-V assembly and C game development that runs natively on the Espressif ESP32-C6 microcontroller and, for functional desktop testing, on the Espressif ESP32-C3 target under QEMU. PRG32 is deliberately not a CPU instruction emulator: programs execute as genuine RV32IMAC machine code on production silicon, and the runtime exposes a small, stable contract built around the classical init/update/draw game loop, a 320×240 16-bit framebuffer driven over SPI to an ILI9341 panel, mono or stereo I2S audio through MAX98357A DAC/amplifier breakouts, and one or two digital joysticks modules. Game programs are packaged as .prg32 cartridges and loaded by the resident firmware either from flash or over Wi-Fi via a runtime HTTP API. We describe the platform architecture, the cartridge programming model, and the assembly/C dual teaching tracks, and we evaluate the runtime on the physical ESP32-C6 board using the built-in performance-test harness, which records the per-frame update, draw, and present stages together with deadline-miss and heap-stability indicators. The measurements separate workloads that are CPU-bound in the draw stage from workloads that are bus-bound at the 40 MHz SPI display link, and quantify the present time as the dominant contributor to per-frame cost across all evaluated workloads. PRG32 is released with the firmware, cartridge tooling, QEMU support, lab materials for both RISC-V assembly and C tracks, and a documented scientific-measurement workflow for repeatable classroom experiments. PRG32 is designed as a preparatory RISC-V systems laboratory for introducing measurement, data-movement bottlenecks, and compute-versus-transfer reasoning before students encounter multicore RISC-V processors, accelerators, or full HPC systems.

ABSTRACT. In this paper we propose a new approach for optimizing La- bel Propagation Algorithms (LPA) based on the Compressed Binary Ma- trix (CBM) format, originally designed for sparse binary matrix opera- tions in AI workloads. Our approach significantly improves the mem- ory footprint compared to standard CSR-based graph representations and exploits structural similarity between graph neighborhoods to min- imize redundant computations. We introduce CBM-based compression strategies tailored to collaboration networks and web graphs, together with efficient OpenMP implementations of our compressed label prop- agation method for shared memory parallel systems. Experimental re- sults on real-world graphs demonstrate substantial memory reduction and speedups over conventional state-of-the-art LPA implementations while maintaining competitive community detection quality.

ABSTRACT. The increasing demand for high-performance computing in plasma physics has driven scalable and resilient simulation methods capable of efficiently exploiting modern multi-GPU architectures. This work extends a portable hybrid MPI+OpenMP implementation of BIT1, focusing on high-performance resilience for accelerated Particle-in-Cell (PIC) Monte Carlo (MC) simulations under both uniform and non-uniform load conditions. Scalable particle load balancing and robust checkpoint/restart mechanisms across NVIDIA and AMD accelerators are integrated with standardized I/O using openPMD and ADIOS2, leveraging BP4 for high-performance file-based checkpointing and SST for in-memory data streaming, enabling efficient data movement, resilient large-scale execution, seamless continuation from existing checkpoints, and effective handling of computational and I/O workloads. Advanced HPC profiling and tracing tools, including NVIDIA Nsight Systems and AMD ROC-Profiler with Perfetto, provide detailed insights into computation, communication, and system-level behavior for optimization. Performance results on Frontier (OLCF-5), MN5, and LUMI-G demonstrate strong and weak scaling up to 800 GPUs, validating the framework for large-scale PIC MC simulations, while in-situ analysis and visualization using scalable I/O further enhance scientific insight without interrupting multi-GPU execution on current and future exascale systems.

ABSTRACT. The development of AI is driven by advanced machine learning (ML) models and large datasets. The computational demands of state-of-the-art ML models have surged by 300,000× in recent years. Federated Learning (FL), a privacy-focused ML technique, can also be computationally intensive and lead to significant energy consumption. This work introduces FedE-ator, a framework designed to measure the actual energy consumption of FL processes in real-world distributed systems. We evaluated the framework in both heterogeneous (CPU/GPU) and large-scale environments to validate its functionality and scalability. In addition, we analyzed resource usage and FL training behavior across multiple FL frameworks, model architectures, and Dynamic Voltage and Frequency Scaling (DVFS) settings using the CIFAR-10 dataset. We show that the proposed framework allows simple and easily reproducible experimental campaigns. The experiments were performed on the Grid’5000/SLICES-FR platform.

ABSTRACT. When solving task scheduling problems, Dynamic Voltage and Frequency Scaling (DVFS) can be leveraged as a means to control and predict task runtimes and system power consumption. If the set of available frequencies is small---as has traditionally been the case with AMD’s x86 processors---energy efficiency is seriously threatened. The amd-pstate scaling driver promises continuous frequency scaling on recent AMD systems from the Zen 2 microarchitecture onward, which could relieve these issues. We present an empirical investigation into whether the claimed capabilities indeed exist and are accessible to the user. Furthermore, we experimentally determine the impact on CPU power consumption for several benchmark workloads and discuss the implications for energy-efficient task scheduling.

ABSTRACT. Distributed batch data processing applications are increasingly executed on cloud-based compute clusters where users normally cannot read node-level hardware energy counters. Energy and carbon attribution methodologies therefore depend on power models and available resource traces, but the accuracy of these estimates has to be validated while direct counters are available. In this work, we use Apache Spark as a case-study runtime and compare model-based energy estimates with Intel RAPL package and DRAM energy on an AWS bare-metal cloud and an on-premises cluster, comparing different CPU usage signals and memory coefficient assumptions. We show that using external monitoring improves mean package-energy error relative to Spark task traces from -29.58% to -24.41% on AWS and from -24.00% to -16.22% on the on-premise cluster.

ABSTRACT. To meet the secure, low-latency multimedia demands of 5G-IoT edge devices, we propose a high-efficiency chaos-based symmetric image encryption accelerator. The design employs a "chaotification" technique to transform stable linear systems into a robust pseudo-random number generator (PRNG) for dynamic S-box and key synthesis. The core engine utilizes an optimized Feistel network with AES transformations in Counter (CTR) mode, eliminating spatial redundancy while enabling parallel processing. Physically implemented on the Xilinx Arty-Z7 SoC, the architecture consumes only 0.491~W at 144.11~MHz, encrypting a $256 \times 256$ image in 4.79~ms. Security evaluations confirm robust immunity against statistical and differential attacks, achieving 7.9976 information entropy, near-zero correlation, 99.6155\% NPCR, and 33.4572\% UACI. This hardware-based framework significantly outperforms software implementations, offering an ideal solution for real-time secure IoT streaming.

ABSTRACT. Large language model (LLM) services increasingly operate on edge infrastructures, enabling low-latency and privacy-preserving AI services. However, efficiently serving LLMs across heterogeneous and resource-constrained edge devices requires orchestration mechanisms that jointly determine model configuration (family, size, and quantization level) and execution placement while satisfying user- and system-level quality of service (QoS) requirements. This paper introduces LMEdge, a QoS-aware orchestration service that dynamically makes these decisions across heterogeneous edge devices. We formulate the problem as a binary integer linear programming (BILP) optimization that minimizes response time under accuracy, network, and resource constraints. To enable scal- able online scheduling, we employ five lightweight machine learning (ML) models to predict query-specific latency, accuracy, resource usage, and response size for each model–size-quantization-device combination, and design a lightweight heuristic that approximates the BILP solution. We collect a comprehensive benchmarking dataset of over 59 000 rows to train models and support reproducibility. Evaluation on a Kubernetes-based edge testbed with 57 instances and diverse query categories shows that LMEdge reduces latency, preserves accuracy, improves resource utilization, and increases serving ratio compared to the baselines.

ABSTRACT. Function-as-a-Service (FaaS) has emerged as the prominent programming model for the edge-to-cloud continuum. FaaS inherently decouples stateless functions from their persistent state. We study how to jointly schedule functions and place data to minimize client latency, considering data replication under heterogeneous consistency requirements. We introduce a Binary Linear Programming (BLP) model to compute optimal placements, establishing a rigorous theoretical baseline. Since the BLP scales cubically with the infrastructure nodes, we propose a topology-aware greedy heuristic that efficiently approximates the optimal solution. Our evaluation shows that the heuristic achieves near-optimal placement quality at a fraction of the computational cost, making it suitable for periodic system reconfigurations.

ABSTRACT. WebAssembly (WASM) is emerging as a lightweight alternative to containers for Function-as-a-Service (FaaS) across the edge-cloud continuum. However, existing WASM-based serverless platforms are tightly coupled to specific execution engines and predominantly designed for stateless workloads. This clashes with the heterogeneity of edge deployments, which demand support for stateful applications under diverse hardware and workload constraints. We introduce WASP, a configurable framework that brings stateful serverless execution to the edge-cloud continuum. By abandoning monolithic architectures in favor of strictly decoupled, pluggable components, WASP lets system administrators swap the WASM runtime and the datastore to fit available resources and application requirements, without altering application code. Configurable lifecycle and caching policies further enable fine-tuning for diverse non-functional requirements. Our experimental evaluation demonstrates that WASP introduces negligible runtime overhead and, by swapping runtimes, datastores, and policies, exposes radically different memory and latency profiles, confirming its adaptability to the heterogeneous constraints of the edge-cloud continuum.

ABSTRACT. Graphs are a powerful abstraction, but their memory-bound nature, irregularity, and frontiers that grow and shrink unpredictably also make them one of the hardest workloads to run efficiently on modern GPUs. Worse, nearly every high-performance graph framework is written in CUDA and therefore cannot run on the AMD and Intel GPUs that power most of today's largest supercomputers. This talk shows how careful algorithmic design can make graph algorithms run efficiently on GPUs, portably across vendors. We first present SYgraph, the first portable heterogeneous graph analytics framework built on SYCL and C++20, running BFS, SSSP, betweenness centrality and connected components on NVIDIA, AMD and Intel GPUs. The key idea is to represent the frontier as a two-layer bitmap rather than a vector, which maps efficiently onto the GPU execution hierarchy and requires no pre- or post-processing. We then turn to a complex real-world application: molecular matching for drug discovery, formulated as subgraph isomorphism. We introduce our SYCL framework, SIGMo, which rethinks the domain of parallelization: rather than parallelizing within one large graph, it parallelizes over the batch, matching thousands of query patterns against millions of molecules at once. This reframing yields up to 1470x speedup and 7.7 billion matches per second on 256 GPUs. The concluding message is that, with proper algorithm and data layout design, graph algorithms can run efficiently on massively parallel hardware.

ABSTRACT. Compiler optimization selection is a challenging problem due to the varying effectiveness of optimizations across programs. In this work, we study graph-based program representations combined with Graph Neural Networks (GNNs) to predict the best compiler optimization. Programs are represented as Control Flow Graphs (CFGs), Abstract Syntax Trees (ASTs), and Program Dependency Graphs (PDGs), and evaluated in both single-view and multi-view settings.

Experiments are conducted on 38 benchmark applications using two compiler optimization flags as classification targets. We evaluate multiple Graph Isomorphisim Network (GIN)-based architectures and feature configurations. Results show that PDG-based representations consistently outperform CFG and AST. Node-level structural features improve performance, while architectural features did not improve accuracy. Multi-view fusion methods based on simple concatenation do not outperform single-view models.

Overall, the study highlights the importance of dependency-rich program representations and exposes key limitations in naïve multi-view fusion and feature integration for compiler optimization prediction.

ABSTRACT. High-performance computing (HPC) systems generate large-scale telemetry streams, but operational monitoring still relies heavily on threshold-based alerts and correlational indicators. For anomaly prediction and reliability analysis, this is insufficient: practitioners also need methods that help distinguish strong predictors from variables that are plausibly involved in system behavior over time. This study presents a reproducible workflow for HPC anomaly prediction and causal screening using the public M100 ExaData telemetry dataset from the CINECA Marconi100 supercomputer. We construct a unified dataset and apply preprocessing, target binarization, missing-value handling, variance filtering, and temporal feature engineering. We evaluate six predictive baselines on a chronological 80/20 split for next-window anomaly prediction, covering four model families: gradient-boosted tabular learning with LightGBM, CatBoost, and XGBoost; reconstruction-based anomaly detection with a semi-supervised autoencoder; sequence aware prediction with a temporal convolutional network (TCN); and graph-aware node-level learning with GraphSAGE.LightGBM achieves the highest ROC-AUC (80.83%), while TCN achieves the strongest minority-class detection metrics, including PR-AUC (30.82%), F1-score (38.15%), precision (36.53%), and recall (39.92%). Because ROC-AUC was pre-specified as the primary model-selection criterion, LightGBM is retained for downstream explanation and causal analysis. We then compare predictive feature importance from Shapley Additive Explanations (SHAP) with causal structure estimates obtained from static PC analysis and temporal Peter–Clark Momentary Conditional Independence (PCMCI). The results show limited overlap between the most predictive variables and the temporally identified causal parents. In addition, sensitivity analysis via feature exclusion indicates that removing highly ranked non-causal predictors can degrade performance more than removing the detected causal-parent features. These findings suggest that predictive importance and causal relevance should not be treated as equivalent in HPC telemetry analysis.

ABSTRACT. Ensuring that HPC applications run efficiently on supercomputers in production environments is far from trivial. Application efficiency can be affected by numerous factors within the runtime stack — from process distribution across compute nodes and memory utilisation to communication library settings and the GPU computing environment. Beyond the application itself, efficiency can also be impacted by other workloads competing for shared resources such as the network and file systems. In such production environments, users rarely have access to detailed metrics about their jobs, primarily due to the complexity of collecting this data and the overhead it introduces to resource usage.

BullSequana ARGOS is a tool specifically designed to address these challenges. It provides detailed, low-overhead metrics in the form of time series, presented both in job reports and through a graphical user interface. Data is collected in near real time, enabling live analysis of running jobs, while all metrics are stored in a database to support broader efficiency analysis for both end users and system administrators.

In this talk, we present the architecture of the tool and demonstrate how it provides actionable insights into application behaviour in real-world production environments.

ABSTRACT. Efficiently managing meteorological data at scale requires highly concurrent access to metadata, particularly for “in-flight” workflows where real-time reporting and analysis tasks must read from the database while the simulation is actively writing. This talk presents the integration of the ECMWF Fields Database (FDB) with Parallax, a specialized Key-Value store based on Log-Structured Merge-trees (LSM), running as a service within the IOSEA Flash Accelerator stack.

We contrast the legacy approach, which relies on file-based logs and POSIX synchronization to coordinate index consistency between producers and consumers, with a service-oriented model where the index lives natively within Parallax. By moving from a file-serialized index to a Flash-resident LSM-tree, we eliminate POSIX synchronization bottlenecks and provide a more efficient context for high-concurrency “read-while-write” patterns.

We will discuss the architectural integration and present preliminary results using the fdb-hammer benchmark.

ABSTRACT. The minisymposium will conclude with an open discussion on software integration, sustainability, maintenance, and adoption challenges for HPC software technologies in future European computing infrastructures.

ABSTRACT. Archaeoastronomy is a field of research that encompasses archaeology and astronomy and aims to investigate the impact of astronomy on archaeological remains. In this paper we consider a specific aspect of this discipline, that aims at determining the correspondence rate between objects constituting a human artifact and objects constituting an asterism, highlighting the probability of intentionality of such correspondence. This process is based on a rigorous mathematical methodology consisting of the Point-Pattern Matching (PPM) algorithm, aimed at finding the best association between two sets of points, and a Monte Carlo simulation, aimed at estimating the probability of intentionality. This problem presents a computational explosion, as it increases factorially with the number of points and quadratically with the Monte Carlo accuracy level, making the problem classically intractable. The aim of this work is to demonstrate how this computational complexity can be reduced by adopting a hybrid High-Performance - Quantum computing (HPCQC) approach (quantum solver for the Point-pattern Matching problem and parallel distribution of the work load on a certain number of computational units for the Monte Carlo simulation), which leads to quasi-linear complexity. The results, summarized in the current work, compare the purely sequential approach with the HPCQC approach, demonstrating the undisputed speedup achievable by adopting the latter methodology.

ABSTRACT. Object detection has become a cornerstone capability in real-world intelligent systems, yet most existing surveys focus exclusively on algorithmic evolution rather than deployment feasibility. This paper presents a deployment-oriented review of object detection methods for edge-constrained environments, with particular focus on three application domains: industrial inspection, surveillance, and medical imaging. We introduce a deployment taxonomy that maps detector families—from classical feature-engineering methods and two-stage CNNs to one-stage detectors, transformers, and lightweight architectures—to domain-specific requirements including latency, power consumption, robustness, and regulatory compliance, extending beyond traditional mAP/FPS metrics. We consolidate benchmark results from the literature and provide unified comparisons on representative edge hardware including NVIDIA Jetson Nano, Jetson Orin NX, and Raspberry Pi 5. We further propose a Cloud-HPC-Edge integration framework that outlines distribution workflows for training on HPC clusters, orchestration via cloud platforms, and inference at the edge using portability tools such as TensorRT, TFLite, and OpenVINO. Practical decision matrices are provided to support model selection in real deployment scenarios. Finally, we identify key open challenges including privacy-aware federated learning, multimodal sensor fusion, standardised edge benchmarks, and continual on-device adaptation, and outline future research directions. Overall, this work shifts emphasis from purely algorithmic comparison to deployment-driven insight, bridging computer vision and distributed systems.

ABSTRACT. At CERN's Large Hadron Collider (LHC), petabytes of data are produced every year and stored for further analysis. As the number of data sets grows, storage resources are getting scarcer. Lossy compression offers an interesting challenge for scientific data: it can achieve far better compression ratios than lossless compression, but its effects are difficult to predict, especially on higher-level quantities of interest (QoIs).

In this paper, we propose a benchmark for assessing the performance of lossy compression of HEP data, and use it to systematically evaluate three lossy compression techniques — quantization, truncation and error-bounded compression using SZ3 — on a set of representative benchmarks.

We find that 24-bit truncation and 16-bit quantization (where possible) result in average compression ratio improvements around 22\% and 30\%, respectively, when compared to lossless compression, whilst preserving acceptable QoI precision levels. In addition, we find that, in most cases, the SZ3 configurations we considered offer no convincing compression benefits over quantization.

Finally, we show that there is no one-size-fits-all configuration, even for data with similar characteristics. Therefore, careful consideration must be put into action, involving a blend of domain knowledge and sensible evaluation metrics.

ABSTRACT. PECS Workshop, Research Update Session

ABSTRACT. As High-Performance Computing (HPC) infrastructures scale toward exascale performance, their energy demands necessitate holistic sustainability strategies that balance performance with the availability of green energy and environmental impact. Evaluating strategies that coordinate hardware configuration, workload scheduling, and energy management on production systems is impractical, while existing simulators exhibit a critical gap: energy-system simulators treat computational demand as static traces, while HPC workload simulators lack integration with microgrid-level energy flows, energy storage, or carbon-aware energy budgets. To bridge this gap, this paper introduces WAVE, a Workload-Aware Vessim Extension. WAVE seamlessly integrates HPC job management and execution, as well as pluggable job-scheduling and infrastructure energy-management policies, into Vessim's microgrid simulator. By introducing instruction-based execution progress, compute hardware power modelling, management of green and traditional energy sources, and carbon footprint analysis, WAVE simulates the dynamic interaction between job scheduling and facility-level energy management. Compute intensity is dynamically obtained from simulated workload execution, subject to renewable energy availability, battery state of charge, and grid carbon intensity. WAVE's efficacy is demonstrated by modelling the heterogeneous architecture of the EuroHPC Deucalion supercomputer with synthetic workloads under FIFO and Priority scheduling policies. The analysis reveals that different scheduling strategies impact workload makespan and overall energy consumption, and how CO2 emissions change by temporally shifting workload into periods of higher or lower grid carbon intensity. WAVE thus provides a simulation framework for exploring the complex trade-offs between HPC workload performance, dynamic hardware configuration, and carbon-aware infrastructure management.

ABSTRACT. High-performance computing (HPC) infrastructures are increasingly constrained by both the economic cost and the environmental impact of electricity, especially when operating under limits on the power that can be drawn from the grid. We study how to reduce the cost and carbon footprint of HPC systems by dynamically selecting energy sources under realistic operating conditions. We consider the energy dispatch problem through a trace-driven framework that combines time-varying demand, electricity price, grid carbon intensity, battery storage, local renewable generation, and backup generation. We compare a sequence of rule-based policies with increasing levels of flexibility: a grid-only baseline, battery-assisted peak shaving, renewable-aware battery dispatch, and a stricter grid-cap scenario supported by a local generator. The results show that the main gains do not come from battery peak shaving alone, but from coordinating storage with local renewable generation. While battery-only peak shaving provides limited benefits, renewable-aware dispatch reduces total cost and total CO2 emissions by more than 60% in the best-performing configuration. We report preliminary results for a Reinforcement Learning approach for the same dispatch setting. The learned controllers achieve modest additional improvements over strong rule-based baselines, suggesting limited but non-negligible optimization opportunities. Overall, the paper shows that trace-driven evaluation provides a useful framework for understanding cost-carbon trade-offs in constrained HPC energy management.

ABSTRACT. This keynote will present an overview of the major research challenges associated with the design and operation of Cloud/Edge infrastructures, focusing on the provision of end-to-end performance and availability guarantees for cyber-physical control and robotic applications while maintaining high levels of resource and energy efficiency. The talk will highlight research led by Prof. Tommaso Cucinotta across several complementary areas, including real-time operating-system support for mitigating temporal interference and noisy-neighbor effects in Linux-based platforms; the design and optimization of fault-tolerant distributed applications; the placement and orchestration of virtualized and containerized services to achieve performance–energy trade-offs; and the adoption of machine learning and artificial intelligence techniques to improve the management and operation of Cloud/Edge environments. The keynote will conclude by discussing open challenges, emerging trends, and promising directions for future research in this rapidly evolving field.

ABSTRACT. Robotic systems increasingly rely on edge-cloud infrastructures for perception, coordination, and control, creating strict requirements on communication latency, transport capacity, and computing availability. Open Radio Access Network (O-RAN) architectures can support such services by flexibly distributing radio access functions across Radio Units (RUs), Distributed Units (DUs), and Centralized Units (CUs). However, functional split selection affects both the computing load at DU/CU sites and the bandwidth and latency requirements imposed on fronthaul, midhaul, and backhaul transport segments. This paper presents a cost-aware split-aware O-RAN planning framework for robotic communication services over hybrid packet and optical transport networks. The problem is formulated as an Integer Linear Program (ILP) that jointly determines DU/CU activation, functional split selection, request-specific RU-DU-CU service-chain selection, and transport-capacity provisioning. Robotic service demands are represented through latency-sensitive and bandwidth-intensive communication requests associated with RU sites. The proposed framework is evaluated on a metro-edge topology to examine how robotic traffic characteristics affect activated computing sites, provisioned transport capacity, split distribution, and deployment cost.

ABSTRACT. In the era of aerial edge computing, where Unmanned Aerial Vehicles (UAVs) increasingly process security-sensitive telemetry near the data source, efficient authentication is essential under strict latency, power, and resource constraints. Meanwhile, next-generation cryptographic standards such as ML-DSA and ML-KEM introduce heavy pseudo-random expansion and hashing workloads based on the FIPS-202 SHA-3 family and SHAKE functions. However, deploying these protocols on UAV edge platforms is challenging because Keccak-f[1600] permutations are compute- and memory-intensive. This paper presents a lightweight FPGA-based SHA-3/SHAKE accelerator for UAV edge computing using a HW/SW co-design approach that offloads hashing kernels to programmable logic while software handles protocol control and serialization. Implemented on the Xilinx Kria KV260 platform, the design is evaluated in terms of resource usage, timing, latency, throughput, and energy efficiency. Results show improved end-to-end authentication performance over a software-only ARM baseline while maintaining a compact footprint suitable for power-sensitive UAV deployments. The modular architecture can also integrate with other avionics security functions, enabling practical quantum-resilient low-latency authentication for UAV swarms and aerial edge services.

ABSTRACT. Quantum computers are expected to accelerate specific computational tasks beyond the capabilities of classical computers. Integrating quantum computers with high-performance computing (HPC) systems offers a promising approach to extending scientific computing capabilities, but it also introduces challenges in programming models, resource management, and system integration.

In 2023, we launched the development of an HPC-oriented Quantum-HPC hybrid computing platform project, featuring a two-layer programming model for both loosely and tightly coupled quantum-HPC applications. Over the past three years, we have implemented this architecture by integrating production HPC systems with multiple quantum computing services and have accumulated practical experience through real-world application deployments.

In this talk, we present the lessons learned from designing, implementing, and operating the platform. We discuss workflow execution, co-scheduling strategies, communication mechanisms, authentication, and resource management, together with experiences gained from representative hybrid applications. We also examine practical issues encountered during system integration and explain how the platform has evolved to support multiple HPC systems and heterogeneous quantum backends. Finally, we discuss remaining challenges and future directions toward scalable and practical Quantum-HPC computing.

ABSTRACT. In this work we introduce 1QDT, a class of Quantum Decision Trees where each decision node is implemented as an independent one-qubit parametric quantum circuit. We evaluate 1QDT performance against Classical Decision Trees (CDTs) and show that 1QDTs remain competitive in classification accuracy while preserving the modularity and explainability of tree-based models.

We then study circuit batching, a technique that compiles several logically independent sample evaluations into a single execution. We benchmark batching under noiseless statevector simulation so that the cost of grouping circuits can be isolated from hardware noise. Our analysis reveals a clear "sweet spot" for these variational circuits: an optimal batching factor at which simulator-launch overhead is strongly reduced before the exponential memory growth of statevector simulation becomes the dominant bottleneck. This study is relevant beyond the simulator itself, because the same batching strategy also matters in shared-QPU settings, where higher utilization must be balanced against hardware noise and crosstalk between qubits. These results establish a quantitative cost-benefit model for circuit batching, defining the operational limits required to maximize throughput in both high-performance simulators and resource-constrained quantum hardware.

ABSTRACT. We present a partially fault-tolerant implementation of QAOA based on the $[[4,2,2]]$ error-detection code, targeting the Max-Cut problem on a square graph. Our main contribution is a novel ancilla-mediated logical $R_{ZZ}$ gate enabling interactions between qubits in different $[[4,2,2]]$ blocks. We evaluate unencoded and encoded circuits under five noise models, with both all-to-all and grid-routed connectivity, using the Cirq and qsimcirq frameworks with parallel CPU execution. Post-selection on stabilizer measurements consistently improves the probability of sampling optimal bitstrings, with five measurements providing the strongest benefit. These results support error-detection as a practical near-term strategy for improving the quality of variational quantum algorithms.

ABSTRACT. Microservices have emerged as a widely adopted architectural style in enterprise software, enabling complex applications to be decomposed into smaller, loosely coupled, and independently deployable components. However, dependencies between distinct microservices negatively affect end-to-end response time, making it difficult to identify the performance bottleneck for each specific scenario, and thus to apply appropriate scaling decisions. Well-known monitoring solutions address this problem by exposing per-service response time metrics, but they remain inapplicable to many legacy applications or those that do not support specific protocols. This paper addresses this issue by presenting a black box analysis approach. Without requiring the integration of distributed tracing or internal application metrics, the proposed solution exclusively exploits signals from the application and infrastructural metrics to orchestrate scaling decisions aimed at the strict adherence to defined Service Level Objectives (SLOs). The proposed approach allowed to reduce response time violations compared to the standard Kubernetes implementation (HPA), while at the same time avoiding excessive waste of resources.

ABSTRACT. The computing continuum demands efficient end-to-end data movement across HPC, cloud, and edge. Cloud-native streaming frameworks are increasingly used to move data from HPC systems to the cloud. However, existing HPC streaming benchmarks primarily compare frameworks at a high level and do not systematically characterize Spark–Kafka configuration parameters under HPC constraints, nor do they evaluate end-to-end HPC-to-cloud delivery. We address both gaps through experiments on an HPC cluster using Singularity containers orchestrated with SLURM. First, we characterize Spark-Kafka streaming across 60 native Kafka configurations, 12 Spark Structured Streaming configurations, and 36 broker-scaling configurations. Spark achieves up to 180 MB/s and improves throughput by 1.7–3.5× compared with native Kafka producers. Second, we evaluate five end-to-end data pipelines for delivering HPC-processed data to the cloud using a 5 GB air-quality dataset. The evaluated approaches include cloud-side processing, direct Kafka over WAN, HPC-side processing with file transfer, MirrorMaker 2, and SkyHOST. Our results show a clear trade-off between completion time and data availability: batch file transfer minimizes completion time but delays data visibility until the payload arrives, whereas streaming enables incremental delivery at the cost of longer completion times over high-RTT WAN links. A regionalized two-hop architecture narrows this gap by decoupling HPC-side production from cross-region transport, and SkyHOST further improves it via transport-layer batching. SkyHOST completes in 210 s, within 13% of the fastest batch approach and 10% faster than MirrorMaker 2, while exposing the first record 3× earlier than the fastest batch pipeline. It also sustains 1.5× lower P95 inter-arrival latency than MirrorMaker 2 (89 ms vs. 132 ms), demonstrating that optimized two-hop streaming can preserve incremental delivery while approaching batch-transfer performance for recurring HPC-to-cloud workloads.

ABSTRACT. The edge computing paradigm is ideal for low-response-time services, such as data-intensive smart city applications, where information is continuously collected from Internet of Things (IoT) devices. Caching the results allows reducing both response time and energy consumption: instead of recomputing tasks or repeatedly accessing IoT devices, previously computed results can be reused. This work proposes a carbon-aware caching policy at the edge that dynamically adjusts the data freshness level based on the carbon intensity of the energy mix. In particular, we evaluate two key aspects: i) Quality of Service (QoS), considering response time and Age of Information (AoI, representing the freshness of the data); and ii) carbon emissions. Our experiments, based on a real smart city use case application, demonstrate that even small degradations in AoI, for example, accepting cached results with AoI up to a minute, can lead to significant reductions in environmental impact: approximately 30% reduction in both CO2 emissions and energy consumption. These findings highlight the potential of adopting carbon-aware caching strategies that explore QoS degradation to reduce the environmental impact of edge computing applications.

ABSTRACT. Distributed DNN inference is increasing deployed in containerized edge-cloud environments, where workloads run on-device or are exposed to remote clients over the network. Accurate online power estimation on resource-constrained ARM nodes without hardware power counters such as RAPL remains a challenge, and CPU-only models fail to capture multi-resource behavior. We present GreenPipe, an automated profiling-training-validation pipeline that builds multi-resource regression models from external power meter measurements and attributes power to containers proportionally. We evaluate on a Raspberry Pi 4 edge node in a K3s edge-cloud testbed, covering three vision models, multiple precisions, thread counts, and local vs. gRPC serving inference. System-level MAPE is 6.3–9.4%, improving over CPU-stress and utilization-only baselines by 26.9% MAPE on average. We jointly report inference latency and energy per inference, exposing performance–energy trade-offs across workloads configurations and deployment modes.

ABSTRACT. Real-time point cloud registration on resource-constrained robots is bottlenecked by feature-based backends such as FPFH+RANSAC: on an NVIDIA Jetson AGX Orin, end-to-end registration latency exceeds the $100\text{ ms}$ inter-frame budget of a $10\text{ Hz}$ LiDAR, causing systematic frame drops and trajectory failure. We address this without modifying application-level perception code through two contributions. First, we integrate the registration pipeline with vAccel, a lightweight middleware that exposes FPFH extraction and RANSAC alignment as out-of-tree plugins and transparently routes them to a remote edge node over a low-overhead RPC transport. Second, we introduce a runtime scheduler that interleaves remote FPFH anchors with locally executed point-to-plane ICP fallbacks whenever the next frame's deadline is at risk.

Across all eleven KITTI Odometry sequences, the vAccel local-execution path adds a mean overhead of approximately $1.5\%$ relative to the stock pipeline (within run-to-run measurement noise), while remote offloading reduces mean per-frame latency by roughly $6\times$ to $16\times$ depending on sequence. The adaptive scheduler keeps the average number of skipped frames per processing window below $0.3$ for seven of eleven sequences and brings mean latency within $1.2\times$--$1.7\times$ of the $100\text{ ms}$ deadline; Sequence 01 (high-speed highway) remains an outlier and motivates the predictive-scheduling extension discussed in the conclusions.

ABSTRACT. Swarm-based video analysis and object detection systems enable scalable, distributed perception across multiple aerial or edge devices, supporting applications such as surveillance and environmental monitoring. In this paper, we present a study on cooperative swarm-based edge object detection that combines adaptive YOLOv8 models with feature-level fusion to enable efficient multi-robot perception under resource constraints. Each robot performs local inference and exchanges compact semantic metadata instead of raw video, significantly reducing bandwidth while enabling collaborative reinforcement of detections across multiple viewpoints. The system integrates approximate computing and multiple YOLOv8 model sizes to trade off accuracy, latency, and energy consumption depending on mission requirements. Experiments conducted show that fusion improves detection accuracy, especially in low-resolution and low-confidence settings, and that performance scales with swarm size and model capacity. Additional evaluation on Raspberry Pi 5 confirms feasibility of lightweight real-time deployment and highlights clear Pareto trade-offs between accuracy, latency, and energy usage.

ABSTRACT. A EuroHPC Centre of Excellence developing quantum-enhanced applications and the software stack required to run them on Europe’s HPC–quantum infrastructure.

ABSTRACT. A European Quantum Centre of Excellence uniting leading research institutions and national ecosystems to provide access to advanced quantum hardware, open-source software, and training programs.

ABSTRACT. Hybrid quantum-classical machine learning requires coordinated execution across heterogeneous resources, including quantum processing units, simulators, and classical accelerators. Although cloud-native orchestration architectures for hybrid QML workflows have recently emerged, their practical adoption still raises challenges related to scheduling, resource elasticity, reproducibility, and interoperability across heterogeneous infrastructures. Building upon our previously published cloud-native orchestration architecture for hybrid quantum-classical MLOps, this manuscript assesses its role in the operationalization and execution on real-world data pipelines and analyses practical challenges related to backend heterogeneity, hybrid scheduling, and coordinated resource management. Starting from a spam detection case study, we analyse practical challenges related to backend heterogeneity, hybrid scheduling, and coordinated resource management. The study highlights how cloud-native orchestration can provide an operational foundation for reproducible and maintainable hybrid quantum--classical machine learning systems.

ABSTRACT. Distributed quantum computing enables the execution of quantum workloads across multiple QPUs, offering performance gains even without quantum communication through parallel circuit evaluation and task partitioning. This work introduces Polypus, an open‑source Rust-based library designed to efficiently orchestrate distributed quantum computing in high‑performance computing environments. Polypus provides modular components for resource management, scheduling, and algorithm execution, while exposing a Python interface for seamless integration into existing quantum workflows. An initial benchmark optimizing QAOA Max‑Cut instances demonstrates significant performance improvements over SciPy in HPC settings. Although still in early development, Polypus lays the groundwork for a scalable and extensible framework for high performance distributed quantum computing and invites community collaboration to expand its capabilities.

ABSTRACT. Quantum-HPC systems need lower-level simulation backends that expose how quantum programs execute at the level below the gate abstraction. This is important for studying dynamic circuits, noise, and the interaction between classical runtimes and QPU execution. It is also important for building simulation backends that expose the timing, uncertainty, and trace information needed by HPC and cloud workflow systems. We present FluxPulse, a C++ pulse-level Hamiltonian simulation backend for superconducting QPUs. FluxPulse represents programs as time-grid pulse envelopes on named control channels, maps them to open system Hamiltonian dynamics, and executes the resulting dynamics using Monte Carlo wavefunction trajectories. The simulator supports effective qubit models, coupled-qubit models with exchange and residual ZZ interactions, and multilevel Duffing transmons. We evaluate FluxPulse on one- and two-qubit pulse benchmarks and show how it exposes timing, noise, stochastic trajectory uncertainty, and trace information needed for investigating quantum-HPC systems.

ABSTRACT. NISQ-era quantum computing increasingly relies on clusters that pool multiple backends with heterogeneous gate-error rates. In such environments, noise-aware placement---that is, preferentially placing noise-sensitive circuits on low-noise premium backends---is a natural strategy for improving execution fidelity. However, when many noise-sensitive jobs compete for the same premium node, the premium backend can become a throughput bottleneck, converting the fidelity benefit of noise-aware placement into longer makespan. This paper quantifies this trade-off on a real Slurm-managed cluster under a controlled congestion variable and proposes Q-CAR (Congestion-Aware Quantum Resource Allocation), a lightweight adaptive policy that combines sensitivity-aware candidate gating, queue- and service-aware cost minimization, and a congestion escape fallback. Measurements show that, under congestion, Q-CAR improves throughput relative to baseline policies while preserving most of their fidelity benefit for noise-sensitive workloads. These results indicate that fidelity preservation and throughput efficiency can be jointly pursued on a real heterogeneous NISQ cluster.