José Flich is Professor at Universitat Politècnica de València where for the last 25 years he teaches subjects related to Computer Architecture and Interconnection Networks. José Flich has published more than 100 and 50 peer-reviewed conference and journal papers, respectively. His research has been focused mainly on interconnection networks for HPC systems, Networks on Chip designs, and recently on the applicability of FPGA devices for emulation of NoCs and multicore systems and on the use of FPGAs as computing platform. He has coordinated several European Projects (FP7 NaNoC project and H2020 MANGO project) and participated as IP in others (RECIPE, DeepHealth, eFlows4HPC). In the MANGO project a 192 FPGA cluster was built for the exploration of HPC architectures.