ARCS 2024: 37ND GI/ITG INTERNATIONAL CONFERENCE ON ARCHITECTURE OF COMPUTING SYSTEMS 2024

This page contains an index consisting of author-provided keywords.

A
Accelerator	Accelerating WebAssembly Interpreters in Embedded Systems through Hardware-Assisted Dispatching nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
Adder Architecture and Circuitry	Comparison of a Binary Signed-Digit Adder with conventional Binary Adder Circuits on Layout Level
ADNA-based Organic Computing	An Organic Computing Approach for CARLA Simulator
AIS Features Engineering	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
ARM Core Mesh Network	Exploring the ARM Coherent Mesh Network Topology
Artificial DNA	Modifiable Artificial DNA - Change your System’s ADNA at any Time An Organic Computing Approach for CARLA Simulator
Artificial Hormone System	An Organic Computing Approach for CARLA Simulator
Auto Encoders	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
Autonomous Driving	An Organic Computing Approach for CARLA Simulator
B
BCH-code	Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes
Behaviour Modelling	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
benchmarking	Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC
Binary Signed-Digit Number Representation	Comparison of a Binary Signed-Digit Adder with conventional Binary Adder Circuits on Layout Level
Biological Neural Network	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
Burst buffer	A Hierarchical Modeling Approach for Assessing the Reliability and Performability of Burst Buffers
C
CARLA	An Organic Computing Approach for CARLA Simulator
CLIC	Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems
CNN	An Approach Towards Distributed DNN Training on FPGA Clusters
co-design	Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC
Compiler Optimisation	Improving Memory Dependence Prediction with Static Analysis
Configuration Optimization	Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity
CPU-QPU computing	Generative-based algorithm for data clustering on hybrid classical-quantum NISQ architecture
D
Data augmentation	Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI
Data clustering	Generative-based algorithm for data clustering on hybrid classical-quantum NISQ architecture
Data compression	Software-based Erasure-tolerant Coding with Buffering and Compression
DEC codes	Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes
DEC-TED codes	Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes
Deep Learning	Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity From Structured to Unstructured: A Comparative Analysis of CV and Graph Models in solving Mesh-based PDEs
Dependability	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
Differentiable Sorting	An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing
Digital Shadows	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
Distributed Systems	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
E
embedded	AccProF: Increasing the Accuracy of Embedded Application Profiling using FPGAs
Embedded Systems	Modifiable Artificial DNA - Change your System’s ADNA at any Time Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
Energy Demand	The Power of Training: How Different Neural Network Setups Influence the Energy Demand
Erasure-tolerant code	Software-based Erasure-tolerant Coding with Buffering and Compression
error correction	Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes
Evaluation on Layout Level	Comparison of a Binary Signed-Digit Adder with conventional Binary Adder Circuits on Layout Level
F
Failure prediction	A Hierarchical Modeling Approach for Assessing the Reliability and Performability of Burst Buffers
Fault tolerance	Software-based Erasure-tolerant Coding with Buffering and Compression
Fault-Tolerance	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
Filtered Back-Projection	On-the-fly CT Image Pre-Processing on MPSoC-FPGAs
Foundation models	Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI
FPGA	AccProF: Increasing the Accuracy of Embedded Application Profiling using FPGAs An Approach Towards Distributed DNN Training on FPGA Clusters Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity
G
Gaussian Mixture Models	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
Generative AI	Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI
H
High Performance Computing (HPC)	Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC
High-Level Synthesis	On-the-fly CT Image Pre-Processing on MPSoC-FPGAs
HPC	A Hierarchical Modeling Approach for Assessing the Reliability and Performability of Burst Buffers
HPC Monitoring	The Power of Training: How Different Neural Network Setups Influence the Energy Demand
Hyperparameter	The Power of Training: How Different Neural Network Setups Influence the Energy Demand
I
Intelligent weed control system	Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI
Interpreter	Accelerating WebAssembly Interpreters in Embedded Systems through Hardware-Assisted Dispatching
L
Layer	An Approach Towards Distributed DNN Training on FPGA Clusters
M
Maritime Behaviour Analysis	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
maximal code length	Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes
Memory Dependence Prediction	Improving Memory Dependence Prediction with Static Analysis
Mesh Interconnect	Exploring the ARM Coherent Mesh Network Topology
Mesh Topographies	From Structured to Unstructured: A Comparative Analysis of CV and Graph Models in solving Mesh-based PDEs
Middleware	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
MobileNetV2	An Approach Towards Distributed DNN Training on FPGA Clusters
N
Network Attached Accelerator	An Approach Towards Distributed DNN Training on FPGA Clusters
Network-on-Chip	Exploring the ARM Coherent Mesh Network Topology
neuroAIx	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
Neuromorphic	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
Neuron	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
NISQ architectures	Generative-based algorithm for data clustering on hybrid classical-quantum NISQ architecture
Noise impact	Generative-based algorithm for data clustering on hybrid classical-quantum NISQ architecture
Non-Uniform Memory Access (NUMA)	Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC
O
On-board Computers	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
Organic Computing	Modifiable Artificial DNA - Change your System’s ADNA at any Time An Organic Computing Approach for CARLA Simulator An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing From Structured to Unstructured: A Comparative Analysis of CV and Graph Models in solving Mesh-based PDEs
P
Parallelism	An Approach Towards Distributed DNN Training on FPGA Clusters
parity	Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes
Partial Differential Equation	From Structured to Unstructured: A Comparative Analysis of CV and Graph Models in solving Mesh-based PDEs
Performability	A Hierarchical Modeling Approach for Assessing the Reliability and Performability of Burst Buffers
Processor	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
profiling	AccProF: Increasing the Accuracy of Embedded Application Profiling using FPGAs
Q
QCBM	Generative-based algorithm for data clustering on hybrid classical-quantum NISQ architecture
Quantile Crossing	An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing
Quantile Regression	An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing
Quantum algorithms	Generative-based algorithm for data clustering on hybrid classical-quantum NISQ architecture
R
Real-Time Data Processing	On-the-fly CT Image Pre-Processing on MPSoC-FPGAs
Real-Time Systems	Modifiable Artificial DNA - Change your System’s ADNA at any Time
Reconfiguration	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
RISC-V	Accelerating WebAssembly Interpreters in Embedded Systems through Hardware-Assisted Dispatching Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems
RTIC	Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems
S
Self-Awareness	An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing
Self-Configuration	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
Self-Healing	Towards the Online Reconfiguration of a Dependable Distributed On-board Computer
Self-Optimization	From Structured to Unstructured: A Comparative Analysis of CV and Graph Models in solving Mesh-based PDEs
Signal Processing	On-the-fly CT Image Pre-Processing on MPSoC-FPGAs
simulation	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC
Software Pipelining	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
Spatio-temporal analysis	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
Spatio-temporal clustering	Enhancing Maritime Behaviour Analysis through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in Kiel Fjord
Speculative Execution	Improving Memory Dependence Prediction with Static Analysis
Static Analysis	Improving Memory Dependence Prediction with Static Analysis
Surrogate Model	From Structured to Unstructured: A Comparative Analysis of CV and Graph Models in solving Mesh-based PDEs
System-on-Chip	On-the-fly CT Image Pre-Processing on MPSoC-FPGAs
systems	AccProF: Increasing the Accuracy of Embedded Application Profiling using FPGAs
V
Vehicle Simulator	An Organic Computing Approach for CARLA Simulator
VLIW	nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models
W
WebAssembly	Accelerating WebAssembly Interpreters in Embedded Systems through Hardware-Assisted Dispatching
Weed detection	Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI

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