ARCS2023: 36TH GI/ITG INTERNATIONAL CONFERENCE ON ARCHITECTURE OF COMPUTING SYSTEMS

This page contains an index consisting of author-provided keywords.

3
3D-stacked Memory	Optimization of OLAP In-memory DB Management Systems with PIM
5
5G networks	Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning
A
adaptive bitrate streaming	Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning
Adaptive Diagnosis	Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing
adaptive middleware	Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks
adjacent errors	Modified Cross Parity Codes For Adjacent Double Error Correction
Apple M1	TOSTING: Investigating Total Store Ordering on ARM
Artificial DNA	Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing Abstract Artificial DNA’s Improved Time Bounds
Automated Machine Learning	Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning
Autonomous navigation	Autonomous ship collision avoidance trained on observational data
Autonomous vessels	Autonomous ship collision avoidance trained on observational data
B
Benchmarking	Optimization of OLAP In-memory DB Management Systems with PIM
C
CGRA	Improved Condition Handling in CGRAs with Complex Loop Support
cloud computing	Retrofitting AMD x86 processors with active virtual machine introspection capabilities
Co-design	COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores
Compute Accelerator	Improved Condition Handling in CGRAs with Complex Loop Support
Cooperation	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs
Covert Channels	Error Codes in and for Network Steganography
cross parity code	Modified Cross Parity Codes For Adjacent Double Error Correction
cyber-physical networks	Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks
cyber-physical systems	Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks
D
Data Center	FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
data transmission	Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning
Decision Theory	A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems
DED	Modified Cross Parity Codes For Adjacent Double Error Correction
Deep neural network	Post-Silicon Customization Using Deep Neural Networks
Deep Neural Networks	A Comparative Study of Neural Network Compilers on ARMv8 Architecture
deep reinforcement learning	Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning
Dependable drone swarms	Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing
DVFS	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs
E
Embedded FPGAs	Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design
Embedded Systems	Abstract Artificial DNA’s Improved Time Bounds
Energy	Back to the Core-Memory Age: Running Operating Systems in NVRAM only
energy efficiency	Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design
Erasure Codes	Error Codes in and for Network Steganography
Error Correcting Block Codes	Error Codes in and for Network Steganography
error correction	Modified Cross Parity Codes For Adjacent Double Error Correction
F
FPGA	Post-Silicon Customization Using Deep Neural Networks FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
G
gem5	COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores
H
Heterogeneous Computing	FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
HPC	COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores
I
In-Memory Database	Optimization of OLAP In-memory DB Management Systems with PIM
Interwoven Systems	Autonomous ship collision avoidance trained on observational data
L
LCTs	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs
learning classifier systems	Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks
Life Cycle Assessment	FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
LSTM	Energy Efficient LSTM Accelerators for Embedded FPGAs through Parameterised Architecture Design
M
MAPE-K	Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks
Memory Ordering	TOSTING: Investigating Total Store Ordering on ARM
Memory Systems	Optimization of OLAP In-memory DB Management Systems with PIM
Middleware	Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing
mixed-criticality	Evaluating the Comprehensive Adaptive Chameleon Middleware for Mixed-Critical Cyber-Physical Networks
monitoring	Retrofitting AMD x86 processors with active virtual machine introspection capabilities
MPSoCs	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs
Multi-Context	Improved Condition Handling in CGRAs with Complex Loop Support
N
Nested Loops	Improved Condition Handling in CGRAs with Complex Loop Support
Network Compression	A Comparative Study of Neural Network Compilers on ARMv8 Architecture
Network on Chip	COMPESCE: A Co-design Approach for memory subsystem Performance Analysis in HPC many-cores
Network Optimization	A Comparative Study of Neural Network Compilers on ARMv8 Architecture
Network Steganography	Error Codes in and for Network Steganography
Network-attached Accelerator	FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
Neural Network Compilers	A Comparative Study of Neural Network Compilers on ARMv8 Architecture
Neural Networks	Overcoming the ReRAM scalibility challenges to optimize memory processing in NNs
NVRAM	Back to the Core-Memory Age: Running Operating Systems in NVRAM only
O
Operating Systems	Back to the Core-Memory Age: Running Operating Systems in NVRAM only
Organic Computing	Towards Dependable Unmanned Aerial Vehicle Swarms Using Organic Computing Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning Self-Adaptive Diagnosis and Reconfigurationin ADNA-Based Organic Computing Abstract Artificial DNA’s Improved Time Bounds
P
Post-silicon customization	Post-Silicon Customization Using Deep Neural Networks
Power-gating	Post-Silicon Customization Using Deep Neural Networks
Predictive Maintenance	Predicting Physical Disturbances in Organic Computing Systems using Automated Machine Learning A Decision-Theoretic Approach for Prioritzing Maintenance Activities in Organic Computing Systems
Processing-In-Memory	Optimization of OLAP In-memory DB Management Systems with PIM
Profiling	Optimization of OLAP In-memory DB Management Systems with PIM
Q
Quantization	A Comparative Study of Neural Network Compilers on ARMv8 Architecture
R
Reconfigurable Computing	FPGA-based Network-attached Accelerators – An Environmental Life Cycle Perspective
Reinforcement learning	Autonomous ship collision avoidance trained on observational data CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs
reliability	Retrofitting AMD x86 processors with active virtual machine introspection capabilities
remote-controlled unit	Real-Time Data Transmission Optimization on 5G Remote-Controlled Units using Deep Reinforcement Learning
ReRAM computing	Overcoming the ReRAM scalibility challenges to optimize memory processing in NNs
Resource management	CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs
S
Scalability	Overcoming the ReRAM scalibility challenges to optimize memory processing in NNs
Scheduling	Improved Condition Handling in CGRAs with Complex Loop Support
Self-supervised learning	Autonomous ship collision avoidance trained on observational data
Semantics	Abstract Artificial DNA’s Improved Time Bounds
stealthiness	Retrofitting AMD x86 processors with active virtual machine introspection capabilities
system security	Retrofitting AMD x86 processors with active virtual machine introspection capabilities
T
TSO	TOSTING: Investigating Total Store Ordering on ARM
V
virtual machine introspection	Retrofitting AMD x86 processors with active virtual machine introspection capabilities
Virtual Sensors	Abstract Artificial DNA’s Improved Time Bounds

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