MEMSYS 2020: The 2020 International Conference on Memory Systems The Westin Arlington Gateway in Arlington VA Washington, DC, DC, United States, September 28-October 1, 2020 |
Conference website | http://memsys.io |
Submission link | https://easychair.org/conferences/?conf=memsys2020 |
Abstract registration deadline | June 5, 2020 |
Submission deadline | June 12, 2020 |
Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology-and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges. Please visit memsys.io for more information.
Submission Guidelines
All papers must be original and not simultaneously submitted to another journal or conference. The following paper categories are welcome:
- Full papers
- Position/short papers
- Abstracts
List of Topics
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Memory-system design from both hardware and software perspectives
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Memory failure modes and mitigation strategies
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Memory and system security issues
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Memory for embedded and autonomous systems (e.g., automotive)
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Operating system design for hybrid/nonvolatile memories
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Technologies including flash, DRAM, STT-MRAM, 3DXP, etc.
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Memory-centric programming models, languages, optimization
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Compute-in-memory and compute-near-memory technologies
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Data-movement issues and mitigation techniques
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Interconnects to support large-scale data movement
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Algorithmic & software memory-management techniques
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Emerging memory technologies, their controllers, and novel uses
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Interference at the memory level across datacenter applications
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Issues in the design and operation of large-memory machines
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In-memory databases and NoSQL stores
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Post-CMOS scaling efforts and memory technologies to support them,
including cryogenic, neural, and heterogeneous memories
Committees
Program Committee
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Ameen Akel, Micron
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James Ang, PNNL
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Abdel-Hameed Badawy, NMSU
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Jonathan Beard, Arm
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Bruce Childers, University of Pittsburgh
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Zeshan Chishti, Intel
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Bruce Christenson, Intel
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David Donofrio, Tactical Computing Labs
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Wendy Elsasser, Arm
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Dietmar Fey, FAU Erlangen-Nürnberg
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Maya Gokhale, LLNL
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Michael Healy, IBM
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Thuc Hoang, NNSA
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Mike Ignatowski, AMD
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Michael Jantz, University of Tennessee
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Hyesoon Kim, Georgia Tech
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Edgar Leon, LLNL
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Scott Lloyd, LLNL
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Trevor Mudge, University of Michigan
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J. Thomas Pawlowski, Pawlowski Cons.
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Hemant Rotithor, Arm
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Robert Voigt, Northrop Grumman
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Gwendolyn Voskuilen, Sandia National Labs
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Owens Walker, US Naval Academy
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David Wang, Samsung
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Norbert Wehn, U. Kaiserslautern
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Noel Wheeler, DoD
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Kenneth Wright, AMD
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Donald Yeung, University of Maryland
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Ke Zhang, Chinese Academy of Sciences
Organizing committee
- Bruce Jacob, University of Maryland
- Kathy Smiley, Memory Systems
Invited Speakers
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Yitzhak Birk, Technion
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Chen Ding, University of Rochester
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Dave Dunning, Qualcomm
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Matthias Jung, Fraunhofer IESE
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John Leidel, Tactical Computing Labs
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Petar Radojkovic, BSC
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Arun Rodrigues, Sandia National Labs
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Kevin Rudd, DoD
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Robert Trout, Micron
Contact
All questions about submissions should be emailed to smiley@memsys.co