DSD 2017: Euromicro Conference on Digital System Design 2017 Vienna, Austria, August 30-September 1, 2017 |
Conference website | http://dsd-seaa2017.ocg.at/dsd2017.html |
Submission deadline | April 28, 2017 |
Scope
The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded, pervasive and high-performance) digital and mixed HW/SW system engineering, covering the whole design trajectory from specification down to micro-architectures, digital circuits and VLSI implementations. It is a forum for researchers and engineers from academia and industry working on advanced investigations, developments and applications.
It focuses on today’s and future challenges of advanced embedded, high-performance and cyber-physical applications; system and processor architectures for embedded and high-performance HW/SW systems; design methodology and design automation for all design levels of embedded, high-performance and cyber-physical systems; modern implementation technologies from full custom in nanometer technology nodes, through FPGAs, to MPSoC infrastructures.
Authors are kindly invited to submit their work according (but not limited) to the seven main topics of the conference main track. In addition, eight Special Sessions (with their own coordinators and subprogram committees) do also welcome contributions in specific themes of particular interest. All papers are reviewed following guidelines, quality requirements and thresholds that are common to all committees.
Main Topics
T1 Advanced applications of embedded and cyber-physical systems
T2 Application analysis and parallelization for embedded and high-performance design
T3 Specification, modeling, verification and test for systems, hardware and embedded software
T4 Design and synthesis of systems, hardware and embedded software
T5 Systems-on-a-chip and networks-on-a-chip
T6 Programmable/re-configurable/adaptable architectures
T7 New issues introduced by emerging technologies
Special Sessions and Organizers
- DTFT: Dependability, Testing and Fault Tolerance in Digital Systems | P. Fiser (CTU Prague, CZ), Z. Kotasek (TU Brno, CZ)
- MCSDIA: Mixed-Criticality System Design, Implementation and Analysis | K. Grüttner (OFFIS, DE), E. Villar (TEISA U Cantabria, ES)
- AHSA: Architectures and Hardware for Security Applications | P. Kitsos (TEI of Western Greece, GR), R. S. Chakraborty (Indian Inst. of Tech. Kharagpur, IN)
- DCPS: Design of Cyber-Physical Systems | M. Geilen, (TUE, NL), D. Quaglia (U Verona, IT)
- ASHWPA: Advanced Systems in Healthcare, Wellness and Personal Assistance | F. Leporati (U Pavia, IT)
- ASAIT: Architectures and Systems for Automotive and Intelligent Transportation | S. Niar (U Valenciennes, FR)
- SDIS: System Design for Intelligent Systems | R. Jacobsen (Aarhus U, DK), E. Ebeid (Aarhus U, DK), B. Beach (U Southern Denmark, DK)
- EPDSD: European Projects in Digital System Design | F. Leporati (U Pavia, IT), L. Jozwiak (TUE, NL)
Important Dates
- Paper Submission Deadline: 15 April 2017
- Notification of Acceptance: 10 June 2017
- Camera-Ready Paper Deadline: 1 July 2017
Committees
Steering Committee
Lech Jozwiak (TU Eindhoven, NL) - Chairman
Krzysztof Kuchcinski (U Lund, SE)
António Nuñez (IUMA/ULPGC, ES)
Francesco Leporati (U Pavia, IT)
Eugenio Villar (TEISA U Cantabria, ES)
José Silva Matos (U Porto, PT)
Program Chairs
Hana Kubatova (CTU Prague, CZ) - Chair
Martin Novotny (CTU Prague, CZ) - Co-chair
General Chair
Erwin Schoitsch (AIT Vienna, AT)
Publication Chair
Amund Skavhaug (Norwegian UST, NO)
Publicity Chair
Paris Kitsos, (TEI Western Greece, GR)
Program Committee
P. Athanas (Virginia Tech, US)
H. Basson (U. Littoral, FR)
T. Basten (TU Eindhoven, NL)
N. Bergmann (U Queensland, AU)
C. Bouganis (Imp. Coll., UK)
G.-M. Callico (ULPGC, Spain)
P. Carballo (ULPGC, ES)
T. Chen (Colorado St., US)
A. Cilardo (U Naples, IT)
G. Danese (U Pavia, IT)
J. Dondo (UCLM, ES)
R. Drechsler (U Bremen, DE)
E. Ebeid (Aarhus U, DK)
A. Eltawil (University of California, Irvine, US)
L. Fanucci (U Pisa, IT)
J. Ferreira (U Porto, PT)
M. Figueroa (U Concepcion, CL)
K. Gaj (George Mason U, US)
P. Gao (Aries Design, US)
V. Goulart (U Kyushu, JP)
R. Jacobsen (Aarhus U, DK)
G. Jacquemod (U Nice-Sophia, FR)
J. Haid (Infineon, AT)
I. Hamzaoglu (U Sabanci, TR)
A. Hemani (KTH, SE)
D. Houzet (Grenoble IT, FR)
M. Hübner (RUB, DE)
L. Jozwiak (TU Eindhoven, NL)
B. Juurlink (TU Berlin, DE)
K. Kent (U New Brunswick, CA)
P. Kitsos (TEI of Western Greece, GR)
Z. Kotasek, (TU Brno, CZ)
H. Kubatova (CTU Prague, CZ)
K. Kuchcinski (U Lund, SE)
S. Kumar (U Jonkoping, SE)
A. Kumar (NUS, SG)
A. Lastovetsky (U Coll Dublin, IE)
J. Lee (U Chosun, KR)
F. Leporati (U Pavia, IT)
E. Martins (U Aveiro, PT)
J. Matos (U Porto, PT)
S. Mosin (Vladimir State U, RU)
V. Muthukumar (U Nevada, US)
N. Nedjah (U Rio de Janeiro, BR)
H. Neto (UT Lisboa, PT)
S. Niar (U Valenciennes, FR)
D. Noguet (CEA, FR)
M. Novotny (CTU Prague, CZ)
A. Nuñez (ULPGC, ES)
A. Oliveira (U Aveiro, PT)
A. Orailoglu (U of California, US)
O. Ozturk (Bilkent University, TR)
A. Pawlak (ITE&SUT, PL)
L. Peng (Louisiana State U, US)
T. Pionteck (U Lübeck, DE)
A. Postula (U Queensland, AU)
Y. Qu (Mediatek, FI)
D. Quaglia (U Verona, IT)
D. Rossi (U Bologna, IT)
J. Sahuquillo (U Pol Valencia, ES)
J. Schmidt (CTU Prague, CZ)
C. Silvano (Pol Milano, IT)
A. Skavhaug (Norwegian UST, NO)
N. Sklavos (U Patras, GR)
L. Sousa (UT Lisboa, PT)
W. Stechele (TU Munich, DE)
A. Tokarnia (U Campinas, BR)
R. Ubar (IT Tallin, EE)
M. Velev (Aries Design, US)
H. Vierhaus (BTU Cottbus, DE)
T. Villa (U Verona, IT)
E. Villar (U Cantabria, ES)
S. Vitabile (U. Palermo, IT)
C. Wang (USTC, CN)
C. Wolinski (IRISA, FR)
A. Yurdakul (U Bogazici, TR)