CARRV 2018: 2nd Workshop on Computer Architecture Research with RISC-V |
Website | https://carrv.github.io |
Submission link | https://easychair.org/conferences/?conf=carrv2018 |
Abstract registration deadline | March 17, 2018 |
Submission deadline | March 24, 2018 |
Call For Papers
The Second Workshop on Computer Architecture Research with RISC-V (CARRV) brings together researchers in fields related to computer architecture, compilers, and systems for technical exchange on using RISC-V in computer architecture research. Submission of early work is encouraged. The topics of specific interest for the workshop include, but are not limited to:
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RISC-V simulation/emulation infrastructures, including ports of existing infrastructures
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Easily modifiable RISC-V RTL cores to support research
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Whole-SoC simulators/emulators and/or models built around RISC-V
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Machine-readable formal models and verification methodologies
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Compiler toolchains and operating system ports to support systems research
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RISC-V-based research prototypes
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Security architecture research
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Memory model research
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Quantitative comparison of RISC-V with other ISAs
The workshop is intended to be highly interactive with an open session discussing experiences with using the current state of the RISC-V ecosystem for architecture research and what directions to take to improve it.
Important Dates:
Abstract submission deadline: March 17, 2018
Full paper submission deadline: March 24, 2018, 23:59 PST.
Author notification: April 8, 2018
Camera-ready version due: May 19, 2018
Submission Guidelines:
All papers should be submitted electronically by EasyChair. Submissions in PDF format must be limited to 6 pages. Please, visit the workshop webpage for additional information about the submission process.