PROGRAM
Days: Sunday, June 7th Monday, June 8th Tuesday, June 9th Wednesday, June 10th
Sunday, June 7th
View this program: with abstractssession overviewtalk overview
08:30-10:00 Session 1A: Tutorial 1 - Injection Locked Oscillators: Applications, Modeling, and Design - Part I
Location: Amphitheatre 001
08:30 | Injection Locked Oscillators: Applications, Modeling, and Design PART I (abstract) |
08:30-10:00 Session 1B: Tutorial 2 - FDSOI Technology - Part I - Body Biasing techniques in UTBB
Location: Room 002
08:30 | FDSOI Technology - Part I - Body Biasing techniques in UTBB (abstract) |
10:00-10:30Coffee Break
10:30-12:00 Session 2A: Tutorial 1 - Injection Locked Oscillators: Applications, Modeling, and Design - Part II
Location: Amphitheatre 001
10:30 | Injection Locked Oscillators: Applications, Modeling, and Design - Part II (abstract) |
10:30-12:00 Session 2B: Tutorial 2 - FDSOI Technology - Part II - Millimeter Wave 28nm-CMOS FD SOI Power Amplifier Design
Location: Room 002
10:30 | FDSOI Technology - Part II - Millimeter Wave 28nm-CMOS FD SOI Power Amplifier Design (abstract) |
12:00-13:30Lunch Break
13:30-15:00 Session 3A: Tutorial 3 - Full Software Radio Circuits and Systems: Design by Mathematics in 28nm FDSOI Technology and Application to 5G Standard - Part I
Location: Amphitheatre 001
13:30 | Full Software Radio Circuits and Systems: Design by Mathematics in 28nm FDSOI Technology and Application to 5G Standard - Part I (abstract) |
13:30-15:00 Session 3B: Tutorial 4 - Substrate Integrated Waveguides: from PCB to Microelectronics Technologies - Part I
Location: Room 002
13:30 | Substrate Integrated Waveguides: from PCB to Microelectronics Technologies - Part I (abstract) |
15:00-15:30Coffee Break
15:30-17:00 Session 4A: Tutorial 3 - Full Software Radio Circuits and Systems: Design by Mathematics in 28nm FDSOI Technology and Application to 5G Standard - Part II
Location: Amphitheatre 001
15:30 | Full Software Radio Circuits and Systems: Design by Mathematics in 28nm FDSOI Technology and Application to 5G Standard - Part II (abstract) |
15:30-17:00 Session 4B: Tutorial 4 - Substrate Integrated Waveguides: from PCB to Microelectronics Technologies - Part II
Location: Room 002
15:30 | Substrate Integrated Waveguides: from PCB to Microelectronics Technologies - Part II (abstract) |
18:00-21:00Welcome reception - La Bastille
Monday, June 8th
View this program: with abstractssession overviewtalk overview
08:30-09:10 Session 5: Opening Ceremony
Location: Auditorium
09:10-10:10 Session 6: Plenary Lecture J. Sifakis
Location: Auditorium
09:10 | The Internet of Things – The Ultimate ICT Revolution (abstract) |
10:10-10:30Coffee Break
10:30-12:00 Session 7A: Phase Locked Loops and Circuits for Optical Communications
Location: Auditorium
10:30 | An Ultra-low Power Charge-Pump PLL with High Temperature Stability in 130 nm CMOS (abstract) |
10:48 | A 20 Gbps Voltage Mode Transmitter with a High-Frequency Signal Boost in 28nm CMOS Technology (abstract) |
11:06 | Low Voltage CMOS Charge Pump with Excellent Current Matching Based on a Rail-to-Rail Current Conveyor (abstract) |
11:24 | A Novel Optical Integrate and Dump Receiver for Clocking Signals (abstract) |
11:42 | Time-Domain Simulation of Quantization Noise Mixing and Charge Pump Device Noise in Fractional-N PLLs (abstract) |
10:30-12:00 Session 7B: EDA/CAD tools
Location: Room 222
10:30 | A Black-Box Approach to RF LNA Design (abstract) |
10:48 | Modeling & PVT Characterization of arbitrary ordered VSCP- PLL using an Efficient Event-Driven Approach (abstract) |
11:06 | Hybrid Encoded QDI Combinational Circuits (abstract) |
11:24 | A Workaround to the Higher Order Derivative Issue of Threshold Voltage Based MOSFET Models (abstract) |
11:42 | A Low-Cost Validation Setup for the Thermal Modelling of Electronic Devices (abstract) |
10:30-12:00 Session 7C: DSP and Multimedia Circuits and Applications
Location: Room 224-225
10:30 | An Automated Ear Identification System Using Gabor Filter Responses (abstract) |
10:48 | DPDK and MKL; Enabling Technologies for Near Deterministic Cloud-based Signal Processing (abstract) |
11:06 | Enhancing a HEVC Interpolation Filter Hardware Architecture With Efficient Adder Compressors (abstract) |
11:24 | A Synthesizable Time to Digital Converter (TDC) with MIMO spatial oversampling method (abstract) |
12:00-14:00Lunch Break
14:00-15:30 Session 8A: Noise and Random Phenomena in Analog Circuits
Location: Auditorium
14:00 | Design of an STT-MTJ Based True Random Number Generator Using Digitally Controlled Probability-Locked Loop (abstract) |
14:18 | High-Speed Analog Processing for Real-Time Fault Location in Electrical Power Networks (abstract) |
14:36 | A New Method for kTC Noise Analysis in Periodic Passive Switched-Capacitor Networks (abstract) |
14:54 | A Fully Integrated 5.78 GHz Array of two Differential Oscillators Coupled Through a MOS transistor Network (abstract) |
15:12 | Analysis of the Effects of Clock Imperfections in N-Path Filters (abstract) |
14:00-15:30 Session 8B: Digital Circuits and Architectures for Processing
Location: Room 222
14:00 | Singular Value Decomposition FPGA Implementation for Tactile Data Processing (abstract) |
14:18 | Approximate Adder Synthesis for Area- and Energy- Efficient FIR Filters in CMOS VLSI (abstract) |
14:36 | Power-Efficient Hardware Architecture for Computing Split-Radix FFTs on Highly Sparsed Spectrum (abstract) |
14:54 | A Curve Fitting Approach for Non-Iterative Divider Design with Accuracy and Performance Trade-off (abstract) |
15:12 | A 4×4-bit Multiplier LSI Implementation of Two Phase Clocking Subthreshold Adiabatic Logic (abstract) |
14:00-15:30 Session 8C: Energy Harvesting: from Devices to Systems
Location: Room 224-225
14:00 | Low Power On-Chip Load Tracking-Zero Compensation Method for Low Dropout Regulator (abstract) |
14:18 | RF powered Integrated System for IoT Applications (abstract) |
14:36 | A New Digital Locking MPPT control for Ultra Low Power Energy Harvesting Systems (abstract) |
14:54 | Tunnel FET device characteristics for RF energy harvesting passive rectifiers (abstract) |
15:12 | Synchronous Electric Charge Extraction for Multiple Piezoelectric Energy Harvesters (abstract) |
15:30-16:30Coffee Break
15:45-17:00 Session 9A: Poster Session I
Location: Petit Salon
15:45 | A Novel Ultrasound Imaging Technique for Portable and High Speed Imaging (abstract) |
15:45 | A Two-Step Layout-in-the-loop Design Automation Tool (abstract) |
15:45 | Quantitative Comparison of Lossless Video Compression for Multi-Camera Stereo and View Interpolation Applications (abstract) |
15:45 | ESD sensitivity investigation on P3HT thin film transistors (abstract) |
15:45 | Low Complexity On-Chip Distributed DC-DC Converter for Low Power WSN nodes (abstract) |
15:45 | FPGA Design of High Throughput LDPC Decoder based on Imprecise Offset Min-Sum Decoding (abstract) |
15:45 | Bandwidth Enhancement of Planar EBG Structure Using Dissipative Edge Termination (abstract) |
15:45 | Adaptive and Digital Blind Calibration of Transfer Function Mismatch in Time-Interleaved ADCs (abstract) |
15:45 | Balancing Test Cost Reduction and Measurements Accuracy at Test Time (abstract) |
15:45 | Optimization of Spectral Resources Allocation in a Context of RF Network on Chip (abstract) |
15:45 | Zero-Power Mismatch-Independent Digital to Analog Converter (abstract) |
15:45 | Miniature Antenna for Breast Tumor Detection (abstract) |
15:45 | A Novel Hardware Accelarator for the HEVC Intra Prediction (abstract) |
15:45 | Digital distortion compensation for wideband direct digitization RF receiver (abstract) |
15:45 | A space grade camera for image correlation (abstract) |
15:45 | Single-Carrier Frequency Division Multiple Access with Discrete Cosine Transform Type-I (abstract) |
15:45 | Finite GBW Compensation Technique for CT Delta-Sigma Modulators with Differentiator Based ELD Compensation (abstract) |
15:45 | A 40Gb/s 27mW 3-tap Closed-loop Decision Feedback Equalizer in 65nm CMOS (abstract) |
15:45-17:00 Session 9B: Meiji University Students'workshop
Location: Petit Salon
15:45 | Evaluation of BER in Different Location of Relay Nodes in Cooperative Transmission for Reliable Wireless Communication in Interference-Limited Environment (abstract) |
15:45 | 1.0V analog FIR filter design using inverters and gilbert cells with 28-nm FDSOI process (abstract) |
15:45 | Design of a Hysteretic Control COT Buck Converter (abstract) |
15:45 | Effect of Aliase in a Direct Sampling Mixer with Complex Poles (abstract) |
15:45 | Matching Circuits of Tapped Delay Line for the Transversal Filter (abstract) |
15:45 | 8GHz Voltage Controlled Oscillators with MOS varactor in 0.18-um CMOS Process (abstract) |
15:45 | A Study on Human Body Detection while Walking by using SISO-UWB Radar in an Indoor Environment (abstract) |
15:45 | Link budget study of a radio relay system using unmanned aerial vehicles (abstract) |
15:45 | Examination of Differential Amplifiers Based on Logic Gates (abstract) |
15:45 | Improvement of temperature characteristics of current mirror using subthreshold P-MOSFET (abstract) |
15:45 | 920MHz Indoor Propagation Measurement and Evaluation for Wireless Sensor Networks (abstract) |
15:45 | Low power RF receiver front-end evaluation in 28nm UTBB FDSOI (abstract) |
15:45 | Run-time Energy-Efficiency Optimization with Embedded Body-Bias Generator in 28nm UTBB FD-SOI Technology (abstract) |
16:30-18:00 Session 10A: Special Session Circuits and Systems for Medical Applications
Location: Auditorium
16:30 | Low-Power Radar Techniques for Remote Sensing and Detection of Vital Signs (abstract) |
17:10 | A wireless fully implantable ECoG recording medical device WIMAGINE®: from the design of an integrated circuit toward a clinical trial (abstract) |
17:40 | Advanced Active Implantable Medical Devices how to get the best trade off between research needs and clinical usability (abstract) |
16:30-18:20 Session 10B: Special Session On-chip Measurements for Characterization, Testing, and Calibration of Analog Front-ends and mmW Devices
Location: Room 222
16:30 | Self-healing of RF Circuits using Built-in Non-intrusive Sensors (abstract) |
16:48 | 150 GHz load pull measurements on BiCMOS 55nm SiGe:C HBT using in situ tuner (abstract) |
17:06 | Calibration and Characterization Techniques for On-Wafer Device Characterization (abstract) |
17:24 | Embedded Instruments for Enhancing Dependability of Analogue and Mixed-Signal IPs (abstract) |
17:42 | Integrated Test Concepts for In-Situ Millimeter-Wave Device Characterization (abstract) |
18:00 | Substrate-Coupling effect in BiCMOS technology for millimeter wave applications (abstract) |
18:45-21:00Cocktail - Visit of the Grenoble Museum
Tuesday, June 9th
View this program: with abstractssession overviewtalk overview
09:00-10:00 Session 11: Plenary Lecture C. Fourtet (SigFox)
Location: Auditorium
09:00 | The technical challenges of future IoT networks and their consequences on modem’s and SoC’s design (abstract) |
10:00-11:30 Session 12: Poster Session II
Location: Petit Salon
10:00 | An Adaptive Magnetically-Coupled Wireless Power Transmission System (abstract) |
10:00 | Attack on a Chaos-Based "True" Random Bit Generator (abstract) |
10:00 | SystemC AMS Modeling of a Sensor Node Energy Consumption and Battery State-of-Charge for WSN (abstract) |
10:00 | Hardware design of a Neural Processing Unit for bio-inspired computing (abstract) |
10:00 | Impact of Small Antenna on Linear Power Amplifier Performance in a Co-design Approach (abstract) |
10:00 | Low-Power Hybrid STT/CMOS System-on-Chip Embedding Non-Volatile Magnetic Memory Blocks (abstract) |
10:00 | New TSV-Based Applications: Resonant Inductive Coupling, Variable Inductor, Power Amplifier, Bandpass Filter, and Antenna (abstract) |
10:00 | A high-Q Tunable Grounded Negative Inductor for Small Antennas and Broadband Metamaterials (abstract) |
10:00 | Reduced model for the comprehension of the operation of a thermo-mechanical energy harvester (abstract) |
10:00 | A Probabilistically Analysable Cache Implementation on FPGA (abstract) |
10:00 | A Capacitively Phase-Coupled Low Noise, Low Power 0.8-to-28.2GHz Quadrature Ring VCO in 40nm CMOS (abstract) |
10:00 | CMOS Voltage Regulator for RF Energy Harvester (abstract) |
10:00 | Single-Switch Inductorless Power Management Circuit for Electrostatic Vibration Energy Harvesters (abstract) |
10:00 | Electret-based Aeroelastic Harvester and its Self-starting Battery-free Power Management Circuit (abstract) |
10:00 | Design and Implementation of a Closed-Loop Controller for a Self-Adaptive IEEE 802.15.4 DBB (abstract) |
10:00 | Optimized Temperature Profile Based Pulse Generator for Innovative Phase Change Memory (abstract) |
10:00 | Dispersion Characteristics of Multilayered Anisotropic Microwave Circuits Independently of the Optical Axis Polarization (abstract) |
10:00 | Low Complexity Fast Filter Bank-based Channelization in L-DACS1 for Aeronautical Communications (abstract) |
10:00 | A Linear Constant Current LED Driver without off-chip Inductor and Capacitor (abstract) |
10:00 | Application-Specific Shared Last-Level Cache Optimization for Low-Power Embedded Systems (abstract) |
10:00-10:30Coffee Break
10:30-12:00 Session 13A: Timing Variations and Resiliency
Location: Auditorium
10:30 | A General Scheme for Noise-Tolerant Logic Design Based on Probabilistic and DCVS Approaches (abstract) |
10:48 | Variability Budget in Pulsed Flip-Flops (abstract) |
11:06 | An Elastic Timer for Wide Dynamic Working Range (abstract) |
11:24 | Local Variations Compensation with DLL-based Body Bias Generator for UTBB FD-SOI technology (abstract) |
11:42 | Performance Evaluation of FinFET-Based FPGA Cluster Under Threshold Voltage Variation (abstract) |
10:30-12:00 Session 13B: Modeling, Design and Conditioning of Sensing Devices
Location: Room 222
10:30 | A time-integration based quenching circuit for Geiger-mode avalanche diodes (abstract) |
10:48 | High resolution, low offset Vertical Hall device in Low-voltage CMOS technology (abstract) |
11:06 | Optimized operation and temperature dependence of a direct Light-to-Time converter (abstract) |
11:24 | A New Enhanced PSPICE Implementation of the Equivalent Circuit Model of SiPM Detectors (abstract) |
11:42 | A Single Photon Avalanche Detector in a 180 nm standard CMOS technology (abstract) |
12:00-13:30Lunch Break
13:30-15:00 Session 14A: Wireless Transmitters and Receivers
Location: Auditorium
13:30 | Design considerations for Low Noise Transconductance Amplifiers in 28nm UTBB-FDSOI (abstract) |
13:48 | A 2.41 GHz ISM Receiver using an IQ VCO-Mixer (abstract) |
14:06 | A Switched-Capacitor Controlled Digital-Current Modulated Class-E EER Transmitter (abstract) |
14:24 | A 1V 830μW Full-band ZigBee Receiver Front-end with Current-reuse and Gm-boosting Techniques (abstract) |
14:42 | Semi-digital FIR DAC for Low Power Single Carrier IEEE 802.11ad 60GHz Transmitter (abstract) |
13:30-15:00 Session 14B: Mixed Signal Circuits
Location: Room 222
13:30 | Additive Companding Implementation to Reduce ADC Constraints for Multiple signals Digitization (abstract) |
13:48 | Q-enhancement with on-chip inductor optimization for reconfigurable delta-sigma radio-frequency ADC (abstract) |
14:06 | A Low Jitter Digital Phase-Locked Loop With a Hybrid Analog/Digital PI Control (abstract) |
14:24 | Cycle-Slipping Pull-In Range of Bang-Bang PLLs (abstract) |
14:42 | Colored Clock Jitter Model in Audio Continuous-Time ΣΔ Modulators (abstract) |
15:00-15:20Coffee Break
15:20-16:50 Session 15A: Voltage References and Power Converters
Location: Auditorium
15:20 | EMI Resisting MOSFET-Only Voltage Reference Based on the ZTC Condition (abstract) |
15:38 | A 0.6V-Supply Bandgap Reference in 65 nm CMOS (abstract) |
15:56 | Rail-to-Rail Multiphase Supply Insensitive Voltage Controlled Oscillator for Low Power Converters (abstract) |
16:14 | A Power-Efficient Wide-Range Signal Level-Shifter (abstract) |
16:32 | Dual-phase 18V 280μA Charge Pump with Active Switches and Passive Level Shifter for Low-Voltage Capacitors (abstract) |
15:20-16:50 Session 15B: Special Session Approximate Computing
Location: Room 222
15:20 | Approximate Computing with Unreliable Dynamic Memories (abstract) |
15:38 | Energy-Efficient Digital Design through Inexact and Approximate Arithmetic Circuits (abstract) |
15:56 | A Scalable Model for Timing Error Prediction under Hardware and Workload Variations (abstract) |
16:14 | Near-Threshold Computing for Very Wide Frequency Scaling: Approximate Adders to Rescue Performance (abstract) |
16:32 | Stochastic Computation With Spin Torque Transfer Magnetic Tunnel Junction (abstract) |
16:50-18:10 Session 16: Panel Session
Location: Auditorium
18:30-23:30Gala Dinner Château de Sassenage
Wednesday, June 10th
View this program: with abstractssession overviewtalk overview
09:00-10:30 Session 17A: Microwave and mm-wave Circuits
Location: Auditorium
09:00 | A Compact 67 GHz Oscillator in 65nm CMOS (abstract) |
09:18 | 81-86 GHz VCO for Backhaul application with S-CPS based differential Inductor in BiCMOS 55nm Technology (abstract) |
09:36 | Ultra Low Power RF Cross-Coupled VCO Design in the Subthreshold Regime with High Immunity to PVT Variations in 130nm CMOS technology (abstract) |
09:54 | A Novel Tunable Impedance Transmission Line for mm-Waves Applications (abstract) |
09:00-10:30 Session 17B: Building Blocks for Biomedical Applications
Location: Room 222
09:00 | A high PSRR, ultra-low power 1.2V curvature corrected Bandgap Reference for Wearable EEG application (abstract) |
09:18 | CMOS DIFFERENTIAL NEURAL AMPLIFIER WITH HIGH INPUT IMPEDANCE (abstract) |
09:36 | Integrated Differential High-Voltage Transmitting Circuit for CMUTs (abstract) |
09:54 | A 1-V, 6-nW Programmable 4th-order Bandpass Filter for Biomedical Applications (abstract) |
10:12 | Analysis of Peak Currents in Integrated Synchronous Rectifiers (abstract) |
09:00-10:30 Session 17C: Analog-to-Digital Converters
Location: Room 224-225
09:00 | At Speed Digital Gain Error Calibration of Pipelined ADCs (abstract) |
09:18 | A Power-Efficient 14-bit 250MS/s Pipelined ADC (abstract) |
09:36 | A Digital Blind Background Calibration Algorithm for Pipelined ADC (abstract) |
09:54 | Low-Power 3rd order Sigma Delta Modulator in CMOS 90-nm for sensors interface applications (abstract) |
10:12 | A Low-Power, 9-Bit, 1.2 ps Resolution Two-Step Time-to-Digital Converter in 65 nm CMOS (abstract) |
10:30-10:50Coffee Break
10:50-11:50 Session 18: Plenary Lecture B. Nauta
Location: Auditorium
10:50 | Circuit Techniques for next Generation Wireless Communication (abstract) |
11:50-13:30Lunch Break
13:30-15:00 Session 19A: Circuits for Wireless Communications
Location: Auditorium
13:30 | Inductorless Low Power Wideband LNA in 130 nm CMOS (abstract) |
13:48 | Low-Energy CMOS Common-Drain Power Amplifier for Short-Range Applications (abstract) |
14:06 | Ultra-WideBand Voltage Controlled Oscillator with Commutable Phases for BPSK Implementation (abstract) |
14:24 | Considerations for High-Speed Configurable-bandwidth Time-interleaved Digital Delta-Sigma Modulators and Synthesis in 28 nm UTBB FDSOI (abstract) |
14:42 | Efficiency Enhancement Using Adaptive Bias Control for 60GHz Power Amplifier (abstract) |
13:30-15:00 Session 19B: Systems for Biomedical Applications
Location: Room 222
13:30 | Cloud-based Orthognathic Surgical Planning Platform (abstract) |
13:48 | Auto Tuning System for a Half Bridge Resonant Converter Using a Synchronous Switched Capacitor (abstract) |
14:06 | A Novel Multichannel Analog-to-Time Converter Based on a Multiplexed Sigma Delta Converter (abstract) |
14:24 | A 2µW Biomedical Frontend with ADC for Self-powered u-Healthcare Devices in 0.18µm CMOS (abstract) |
14:42 | Ultra WideBand RADAR System for Human Chest Displacement (abstract) |
13:30-15:00 Session 19C: Special Session Control Techniques for Adaptive Computing Systems
Location: Room 224-225
13:30 | Energy-efficient control through power mode placement with discrete DVFS and Body Bias (abstract) |
13:48 | Adaptive Computing in Real-Time Applications (abstract) |
14:06 | Autofocus performance realization using automatic control approach (abstract) |
14:24 | A distributed synchronization of all-digital PLLs network for clock generation in synchronous SOCs (abstract) |
14:42 | WSN Power Management with Battery Capacity Estimation (abstract) |
15:00-15:20Coffee Break
15:20-16:50 Session 20A: Digital Design and Modeling
Location: Auditorium
15:20 | Impact of short-channel effects on velocity overshoot with hydrodynamic transport (abstract) |
15:38 | Priority-Select Arbiter: An Efficient Round-Robin Arbiter (abstract) |
15:56 | Self-Timed Circuits FPGA Implementation Flow (abstract) |
16:14 | Power Gain Estimation of an Event-driven Wake-Up Controller dedicated to WSN’s Microcontroller (abstract) |
15:20-16:50 Session 20B: Filters and Transconductors
Location: Room 222
15:20 | Subthreshold Operation of Nauta's Operational Transconductance Amplifier (abstract) |
15:38 | A 30MHz 28dBm-IIP3 3.2mW Fully-Differential Sallen-Key 4th-Order Filter with Out-of-Band Zeros Cancellation (abstract) |
15:56 | Digitally Controlled Transconductor Based on a Quantum Transconductance (abstract) |
16:14 | Self calibrating High sensitivity Ultra-low power Envelope detector (abstract) |
16:32 | 0.7-V Bulk-Driven Three-Stage Class-AB OTA (abstract) |
15:20-16:50 Session 20C: Sensing Systems Integration
Location: Room 224-225
15:20 | Analysis and Design of Ka-Band SoC Radiometer for Space Detection of Solar Flares (abstract) |
15:38 | Sub-picoampere, 7-decade current to frequency converter for current sensing (abstract) |
15:56 | Continuous calibration of Rogowski coil current transducer (abstract) |
16:14 | Efficiency improvement of high rate integrated Time Correlated Single Photon Counting systems by incorporating an embedded FIFO (abstract) |
16:32 | All-digital MEMS tuning-fork self-excited vibration control by phase-relation using TAD-based ADPLL (abstract) |
16:50-17:20 Session 21: Closing Ceremony
Location: Auditorium