ESREF 2016: 27TH EUROPEAN SYMPOSIUM ON RELIABILITY OF ELECTRON DEVICES, FAILURE PHYSICS AND ANALYSIS
PROGRAM FOR MONDAY, SEPTEMBER 19TH
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13:30-15:20 Session 1: Opening Session with Keynotes 1+2

Opening Session (Part 1) with Keynotes 1+2

Location: Einstein
13:30
Welcome to ESREF 2016
14:00
22FDX and it's application in Energy Efficient Designs, Automotive and IoT - from foundry perspective

ABSTRACT. We were used to execute ​according to ​Moore’s Law over the last decades. This road ​leads ​the semiconductor industry into highly scaled technologies: 14, 10 and 7 nanometer.

However​,​ economically ​a foundry ​should look ​towards the next hype building up​,​ ​the ​Internet of Things. ​I​​t​ is critical to ​offer the right technology ​to market at ​competitive cost​​ ​with high performance, low power consumption​ and with build in connectivity. T​his automatically leads to Fully Depleted technologies with optional embedded RF capability as well as 28/22nm patterning​,​ with no need of extensive use of double patterning or new light sources for lithography. 

28nm is known as the "sweet spot" in Foundry Industry for yield/performance AND cost. This node is in high volume production and will be the basis to add technology features like embedded RF, Flash, High Voltage (HV) or other value add solutions and is already predicted to have a long lifetime in our industry. In particular embedded RF and HV are key ​to communicate with the outside analog world in a power efficient and user​-​friendly way.

​Technology-wise,​ 22FDX is ​reusing ​proven 28nm​ processes, while adding new features​. Devices on Fully Depleted SOI substrates can operate at voltages down to 0.4V with outstanding performance. This technology meets the desire of IOT products to be ultra mobile and enables small form factors. In addition​,​ ​the technology setup is ​much ​simpler, requires ​a lower number of mask layers and is ideal for a broad range of low power devices for automotive and IOT applications at lower cost.

22FDX makes "Faster, cooler, simpler" a reality and delivers FinFET performance at 28nm costs.

14:40
Automotive Electronics Roadmap and the Wish List on Electronics

ABSTRACT. Piloted driving, always connected, artificial intelligence and digitization are necessary ingredients for the mobility of tomorrow. The automotive industry, its applications, use cases and customer expectations are changing at a progressively faster speed. Already more than 80% of all automotive innovations are directly or indirectly enabled by semiconductors. How to resolve the conflicts between the latest semiconductor technologies and the stringent automotive quality and reliability requirements? How to solve the future automotive challenges towards autonomous driving and an always-on 24/7 operation? How to ensure a mission critical robustness?

The presentation will deduce a roadmap and a wish list on tomorrows automotive electronics from the new challenges.

15:40-16:40 Session 2: Opening Session - Exchange Papers

Opening Session (Part 2) - Exchange Papers

Location: Einstein
15:40
Quantitative model for post-program instabilities in filamentary RRAM

ABSTRACT. This paper discusses and models the program instability observed in filamentary Hf-based RRAM devices in the context of the Hourglass model. It is demonstrated that two variability sources can be distinguished: (i) number variations of the amount of vacancies in the filament constriction and (ii) constriction shape variations. The shape variations are not stable in time and show a log(time)-dependent relaxation behavior after each programming pulse. This makes program/verify schemes, aiming at widening the resistive window, highly ineffective. We develop a quantitative, mathematical description of the instability using an auto-correlated step process of the shape parameters of the QPC conduction model.

16:00
Asymmetric Low Temperature Bonding Structure Using Ultra-Thin Buffer Layer Technique for 3D Integration
SPEAKER: Hao-Wen Liang

ABSTRACT. Wafer-level Sn/In-Cu bonding structure with Ni ultra-thin buffer layer is investigated to achieve a reduction in solder thickness, bonding temperature and duration. Furthermore, the asymmetric bonding structure is able to separate the manufacturing process of solder and electrical isolation layer. It is a promising approach for the application on hybrid bonding of three-dimensional integration.

16:20
Corrosion Mechanisms of Cu Bond Wires on AlSi Pads
SPEAKER: George Chang

ABSTRACT. Cu wires were bonded to AlSi (1%) pads, subsequently encapsulated and subjected to uHAST (un-biased Highly Accelerated Stress Test, 130 °C and 85% relative humidity). After the test, a pair of bonding interfaces associated with a failing contact resistance and a passing contact resistance were analyzed and compared, with transmission electron microscopy (TEM), electron diffraction, and energy dispersive

spectroscopy (EDS). The data suggested the corrosion rates were higher for the more Cu-rich Cu-Al intermetallics (IMC). The corrosion was investigated with factors including electromotive force (EMF), self-passivation of Al, thickness and homogeneity of surface oxide on the IMC, ratio of the Cu-to-Al surface areas exposed to the electrolyte for an IMC taken into account. The preferential corrosion observed for the Cu-rich IMC is attributed to the high ratios of the surface areas of the cathode and anode that were exposed to the electrolyte, and degradation of the passivation of the surface oxide. With the understanding of the corrosion mechanisms, prohibiting the formation of Cu-rich IMCs is expected to be an approach to improve the corrosion resistance of the wire bonding, which is actually consistent with Pd-coating of the wire that is nowadays widely adopted in the industry.

16:40-18:40 Session : Exhibition Opening / Get-together / Drinks Reception

Exhibition Opening / Get-together / Drinks Reception

Location: Foyer