Tags:Invariant Checking, Invariant Synthesis, Local Theory Extensions, Quantifier Elimination, SMT and Symbol Elimination
Abstract:
We study possibilities of using symbol elimination in program verification and synthesis. We consider programs in which some instructions or subprograms are not fully specified; the task is to derive conditions on the parameters (or subprograms) which imply inductivity of certain properties. We then propose a method for property-directed invariant generation and analyze its properties.