WPQC'25: 1st Workshop on Post-Quantum Cryptography Resilience, Verification, and Secure Design Automation (Co-located with ICCAD'25) The Westin Grand Munich Munich, Germany, August 29-30, 2025

Overview

The rapid transition toward Post-Quantum Cryptography (PQC) has prompted a global effort to redefine digital security in anticipation of quantum-capable adversaries. While PQC algorithms are mathematically robust, their secure and efficient integration into hardware systems introduces new vulnerabilities and engineering challenges—especially in areas such as side-channel resistance, hardware/software co-design, and formal verification.

The Workshop on Post-Quantum Cryptography and Secure Hardware (WPQC) aims to address these challenges by serving as a dedicated forum for researchers and practitioners in hardware security, EDA/CAD, computer architecture, and cryptography. The workshop provides a platform to explore the intersection of PQC and hardware/system design, highlighting recent advancements in secure accelerator development, design automation, system integration, and emerging threat models.

By bringing together experts from academia, industry, and standardization bodies, WPQC seeks to accelerate collaborative research efforts and foster a shared vision for building resilient, verifiable, and efficient post-quantum systems in conjunction with ICCAD 2025.

Workshop Objective

The primary objectives of WPQC are to:

• Bridge the Gap between cryptographic research and secure hardware/system implementation in the quantum-resilient era.
• Highlight Emerging Threats such as side-channel attacks and fault injection vulnerabilities in PQC-based systems.
• Showcase Innovations in CAD tools, design automation, and secure co-design methodologies tailored for PQC workloads.
• Facilitate Collaboration among cryptographers, system designers, verification engineers, and hardware security experts.
• Encourage Community Building through open discussions, invited talks, panel sessions, and benchmarking initiatives focused on PQC.

Topics of Interest

We invite submissions and talks (short/regular papers, posters, demos, or talks) on the following topics, including but not limited to:

Security & Resiliency

• Hardware/software co-design for PQC resilience
• Secure accelerator design and countermeasure techniques
• Microarchitectural security for PQC workloads
• Side-Channel Attacks (SCA) on PQC: Power, EM, timing, cache, etc.
• Fault Injection Attacks (e.g., laser, clock glitch, DVFS) on PQC
• Resilience Mechanisms: Countermeasures against SCA/faults
• Hardware Trojans in PQC Accelerators
• Hardware Trojans and backdoor analysis in PQC IP
• Secure PQC Accelerator Design & Deployment

Design Automation & Integration

• Design automation for PQC SoCs and accelerators
• Low-power and area-optimized implementations of PQC
• Hardware/software co-design for PQC primitives
• EDA tools and flows for PQC integration
• PQC-aware hardware synthesis & optimization
• Power/thermal analysis for PQC implementations

Verification & Formal Methods

• Formal verification of PQC implementations
• Verifiable computation with PQC
• Equivalence checking and hardware compliance with NIST PQC standards
• Formal verification of PQC implementations
• Verifiable computation with PQC

System & Application Domains

• PQC in embedded systems, IoT, and automotive domains
• Quantum-safe firmware, secure boot, and key management
• PQC deployment in cloud and edge computing
• System-on-Chip (SoC) integration of PQC primitives
• Post-Quantum secure architectures for AI/ML workloads

Frameworks & Benchmarks

• Benchmarking frameworks for PQC evaluation
• Open-source EDA flows and simulation tools for PQC
• Fault models and evaluation metrics for post-quantum circuits

Emerging Topics

• Quantum-aware hardware design and CAD tools
• Machine learning for side-channel analysis on PQC
• Side-channel analysis of quantum neural networks
• Quantum-safe security for supply chains
• PQC in AI/neuromorphic and emerging computing architectures

Target Audience

The workshop is designed to engage a diverse audience, including:

• Hardware security researchers interested in quantum-era threat models
• Cryptographers exploring physical implementation concerns
• EDA and CAD tool developers working on PQC-specific flows
• System architects and engineers integrating PQC into real-world applications
• Industry practitioners and standardization contributors from semiconductor, defense, and secure communications sectors
• Graduate students and early-career researchers seeking to enter the PQC hardware domain

We also encourage participation from stakeholders in the NIST PQC standardization efforts and related government/defense initiatives.

Submission Guidelines

The following categories are welcome to submit as a two-page extended abstarct:

• Industry and Academic Expert Talks and Demos
• Panel Discussion
• Student Presentaions and Posters

All papers must be in PDF format only, with savable text and embedded fonts in included graphics. Each paper must be double-columned, 9pt or 10pt font.Your submission must include author(s) information. Paper templates are available at the ICCAD website and authors are recommended to format their papers based on the IEEE template.

Submissions of workshop/conference papers with/without archived proceedings, previously published journal papers, or pre-prints, e.g., published on arXiv are allowed.

At least one author per accepted paper/poster or invited talk must be registered to the conference by August 14, 2025. The workshop reserves the right to exclude a paper from distribution after the conference if the paper is not presented at the conference.

Submit your manuscripts via https://easychair.org/conferences/?conf=wpqc25. Accepted submissions will be archived online.

Committees

Speakers

• Mojtaba Bisheh-niasar, Microsoft
• Reza Azarderakhsh, Florida Atlantic University and Founder of PQSecure
• Shivam Bhasin, Nanyang Technological University (NTU), Singapore
• Trevor E. Carlson, National University of Singapore (NUS), Singapore

Organizing committee

• Trevor E. Carlson, National University of Singapore (NUS), Singapore
• Shivam Bhasin, Nanyang Technological University (NTU), Singapore
• Mojtaba Bisheh-niasar, Microsoft
• Saeed Aghapour: University of South Florida
• Burin Amornpaisannon, National University of Singapore (NUS), Singapore
• Mona Hashemi, National University of Singapore (NUS), Singapore

Contact

All questions about submissions should be emailed to Mona Hashemi (monah@nus.edu.sg).