VTTW 2018: VLSI Test Technology Workshop 2018 Huisun Forest Area Nantou County, Taiwan, July 9-11, 2018

VTTW 2018 CfP

Submission Guidelines

Attention: 
Paper submissions should be camera-ready manuscripts, not exceeding six two-column pages (including a 50 to 200-word abstract, figures, tables, and bibliography) in pdf format.

The submission will be considered evidence that upon acceptance the author(s) will present the paper at the workshop. The registration of at least one author is required for each presented paper; all presentations should be given in English.

List of Topics

• Contributions related to electronic circuit and system testing are solicited. Topics of interest include, but are not limited to:

  · Test Generation and Fault Simulation
  · Design for Testability and Reliability
  · Fault Tolerance and Error Correction
  · Failure Analysis and Fault Modeling
  · Analog/Mixed-Signal and RF Testing
  · CPU Testing
  · Memory Testing and Repair
  · High-Speed I/O Testing
  · System-Level Testing
  · Built-In Self-Test
  · ESL Testing
  · Silicon Debug and Diagnosis
  · Test Economics
  · Wafer-Level Testing
  · SoC/SiP/3D IC Testing
  · Interconnect Testing and Repair
  · On-Chip Monitoring
  · Yield and Reliability Enhancement

Venue

The conference will be held in Huisun Forest Area

Address: No.1, Shanlin Ln., Re'ai Township, Nantou County 546, Taiwan (R.O.C.)

More Info.