REFAC'19: First International Workshop on Legacy Software Refactoring for Performance |
Website | https://refac-ws.gitlab.io/2019/ |
Submission link | https://easychair.org/conferences/?conf=refac19 |
Submission deadline | April 18, 2019 |
The "First International Workshop on Legacy Software REFACtoring for Performance" held in conjunction with the ISC High Performance conference (ISC'19) in Frankfurt am Main is the first event of its kind that is dedicated to the much needed shift in focus from hardware to software to achieve performance gains. Modernizing hardware has too long been the primary method of accelerating legacy software, and close to half of the expected performance improvement in legacy codes can be attributed to improve processor technology. More than half of this improvement was based on Moore's law and its observation that transistors will continue to become smaller every few (originally two) years. The remaining hardware improvements came from architectural innovations, such as deeper cache hierarchies, the migration to more exotic architectures (e.g. GPUs), or the utilization of larger and wider vector-units (SIMD), as well as scaling the HPC systems up by giving them more processors and cores. Unfortunately, we are no longer seeing the consistent technology scaling that Gordon Moore observed. Instead, the technology scaling has significantly slowed down, and is expected to continue only for a few more years. Consequently, in the so-called Post-Moore era, the "performance road" forks three-ways, yielding the following alternatives: (1) architectural innovations will attempt to close the performance gap, and an explosion of diverging architectures tailored for specific science domains will emerge, (2) alternative materials and technologies (e.g. non-CMOS technologies) allow the spirit of Moore's law to continue for a foreseeable future, or (3) we abandon the von-Neumann paradigm together and move to a neuromorphic or quantum-like computer (which, in time, might or might not become practical). Independent on what direction we will end up taking in the future, the following will hold: software and algorithmic optimization will be transferable to the first two out of the three identified directions. It is these architecture-oblivious software optimizations that are the primary scope of the proposed workshop.
Workshop Scope
The list of topics we will highly encourage for submissions includes, but is not limited to, the following interdisciplinary research areas:
- All types of general-purpose processor legacy-software optimizations for HPC,
- Changes to (collective) communication algorithms or implementations to enable the use of different numerical methods (for example: Lagrangian vs. Eulerian),
- Accelerating of pre-/post-processing in a scientific workflows or axillary tools used in HPC environments,
- Improved maintainability and performance through the use of existing production libraries,
- Revisiting and applying modern compiler (flag) techniques, performance analysis tools, moderate usage of OpenMP pragmas, etc., for performance gains,
- Manual code refactoring, such as loop transformations or changing data structures, to acknowledge the shifting ratio in memory vs. compute capabilities of modern architectures, and
- Using mixed or adaptive precision wherever possible.
It is important to mention that all time-to-solution optimizations must be performed under the premise that the results produced by the scientific code are either 1:1 comparable, won't break numerical stability, or pass a given set of verifications tests, in case the application/library includes such correctness checking. Hence, HPC experts submitting to our workshop are advised to collaborate with domain experts while performing such optimizations. Furthermore, we look forward to cost saving estimates, based on CPU cycles spend by the software vs. CPU cycles saved through optimization while using realistic data/input sets, in the submitted manuscripts.
Submission Guidelines
All papers must be original and not simultaneously submitted to another journal or conference. Submission must adhere to:
- Only accepted style: LNCS (see Springer's website)
- Single column format
- No modification to font size of LNCS template
- Maximum of 10 pages (min. 6) in PDF format, including figures and references
- Incorrectly formatted papers will be excluded
Committees
Program Committee
- Andreas Knüpfer (ZIH, TU Dresden, Germany)
- Anshu Dubey (ANL, USA)
- Barna Bihari (LC, LLNL, USA)
- Bernd Mohr (JSC, FZJ, Germany)
- Dali Wang (CCSI, ORNL, USA)
- Daniel Molka (DLR, Germany)
- Didem Unat (Koç University, Turkey)
- Guido Juckeland (HZDR, Germany)
- Hisashi Yashiro (RIKEN-CCS, Japan)
- Saurabh Chawdhary (ANL, USA)
- Seyong Lee (ORNL, USA)
Organizing committee
- Mohamed Wahib (RWBC-OIL, AIST, Japan)
- Jens Domke (R-CCS, RIKEN, Japan)
- Artur Podobas (R-CCS, RIKEN, Japan)
Contact
Please, use the email form at the bottom of the workshop website: https://refac-ws.gitlab.io/2019/ to submit questions to the workshop organizers.