ParLearning-2018: The 7th International Workshop on Parallel and Distributed Computing for Large Scale Machine Learning and Big Data Analytics In Conjunction with 32nd IEEE International Parallel & Distributed Processing Symposium (IPDPS) Vancouver, Canada, May 21, 2018 |
Conference website | http://parlearning.ecs.fullerton.edu/ |
Submission link | https://easychair.org/conferences/?conf=parlearning2018 |
Abstract registration deadline | February 16, 2018 |
Submission deadline | February 16, 2018 |
Scaling up machine-learning (ML), data mining (DM) and reasoning algorithms from Artificial Intelligence (AI) for massive datasets is a major technical challenge in the time of "Big Data". The past ten years have seen the rise of multi-core and GPU based computing. In parallel and distributed computing, several frameworks such as OpenMP, OpenCL, and Spark continue to facilitate scaling up ML/DM/AI algorithms using higher levels of abstraction. We invite novel works that advance the trio-fields of ML/DM/AI through development of scalable algorithms or computing frameworks. Ideal submissions should describe methods for scaling up X using Y on Z, where potential choices for X, Y and Z are provided below.
Scaling up
- Recommender systems
- Optimization algorithms (gradient descent, Newton methods)
- Deep learning
- Sampling/sketching techniques
- Clustering (agglomerative techniques, graph clustering, clustering heterogeneous data)
- Classification (SVM and other classifiers)
- SVD and other matrix computations
- Probabilistic inference (Bayesian networks)
- Logical reasoning
- Graph algorithms/graph mining and knowledge graphs
- Semi-supervised learning
- Online/streaming learning
- Generative adversarial networks
Using
- Parallel architectures/frameworks (OpenMP, OpenCL, OpenACC, Intel TBB)
- Distributed systems/frameworks (GraphLab, Hadoop, MPI, Spark)
- Machine learning frameworks (TensorFlow, PyTorch, Theano, Caffe)
On
- Clusters of conventional CPUs
- Many-core CPU (e.g. Xeon Phi)
- FPGA
- Specialized ML accelerators (e.g. GPU and TPU)
Proceedings of the Parlearning workshop will be distributed at the conference and will be submitted for inclusion in the IEEE Xplore Digital Library after the conference.
Travel awards: Students with accepted papers have a chance to apply for a travel award. Please find details on the IEEE IPDPS web page.
Submission Guidelines
Submitted manuscripts should be upto 10 single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. Format requirements are posted on the IEEE IPDPS web page.
All submissions must be uploaded electronically at https://easychair.org/conferences/?conf=parlearning2018
Important Dates
- Paper submission: February 16, 2018 AoE
- Notification: March 16, 2018
- Camera Ready: March 30, 2018
Organizing committee
- General chairs: Henri Bal (Vrije Universiteit, The Netherlands) and Arindam Pal (TCS Innovation Labs, India)
- Technical Program co-chairs: Azalia Mirhoseini (Google Brain, USA) and Thomas Parnell (IBM Research – Zurich, Switzerland)
- Publicity chair: Yanik Ngoko (Université Paris XIII, France)
- Steering Committee: Sutanay Choudhury (Pacific Northwest National Laboratory, USA), Anand Panangadan (California State University, Fullerton, USA), and Yinglong Xia (Huawei Research America, USA)
Contact
Please direct questions to Arindam Pal <arindamp@gmail.com>