ParaFPGA2019: Parallel computing with FPGAs Faculty of Mathematics & Physics, Charles University Prague, Czechia, September 10-13, 2019 |
Conference website | http://parafpga.elis.ugent.be |
Submission link | https://easychair.org/conferences/?conf=parafpga2019 |
Submission deadline | June 10, 2019 |
ParaFPGA is a regular track of the Parallel Computing conference used to collect and disseminate recent research on the development and application of reconfigurable architectures in high-performance computing. Field Programmable Gate Arrays are becoming mainstream accelerators of data centers, high-end processors, web services and cloud computing. The power of the reconfigurable hardware resides in an ever growing ecosystem of tools, programming environments and applications. High-performance computing requires new avenues and creative solutions to alleviate the power and frequency limitations of today's processors. New reconfigurable architectures and designs are now managed by common languages such as OpenCL combined with dedicated programming and synthesis environments. Still, parallel programming of FPGAs presents exciting opportunities for research and development. This call for papers seeks original contributions to expand the design and application knowledge in the field.
Submission Guidelines
Authors are invited to submit a full paper of maximum 10 pages or an extended abstract of minimal 6 pages, using the modalities specified at the symposium website http://parafpga.elis.ugent.be. The approved contributions will be presented at the conference and the accepted full papers are published in the ParCo 2019 proceedings.
List of Topics
Original contributions on parallel computing with FPGAs are requested in areas including but not limited to:
- parallel processing using FPGAs in e.g. image processing, deep learning, bioinformatics, smart contracts or cloud computing
- design space exploration tools and techniques
- OpenCL-based FPGA design
- domain specific high-level synthesis languages
- partial reconfiguration to reuse IP-cores
- run-time management of IP-cores
- hybrid CPU/GPU/FPGA systems for e.g. real-time video or automotive systems
- performance evaluation of FPGA architectures and applications
Committees
Program Committee
- Abdellah Touhafi, Vrije Universiteit Brussel, Belgium, chair
- Hal Finkel, Argonne National Laboratory, USA
- Frank Hannig, Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
- Yun Liang, Peking University, China
- Tsutomu Maruyama, University of Tsukuba, Japan
- Dionisios Pnevmatikatos, Technical University of Crete, Greece
- Viktor Prasanna, University of Southern California, USA
- Dirk Stroobandt, Ghent University, Belgium
- Sotirios G. Ziavras, New Jersey Institute of Technology, USA
Organizing committee
- Gerhard Joubert, Conference committee chair
- Ian Foster and Wolfgang E. Nagel, ParCo Program committee chairs
- Luděk Kučera and Pavel Tvrdik, Organizing committee chairs
- Erik D'Hollander, ParaFPGA symposium chair
- Frans Peters, Finance Chair
All refereed and accepted papers presented at the conference will be published in the proceedings of the ParCo2019 conference subject to the ParCo proceedings guidelines. The proceedings will be published after the conference by IOS Press in the series Advances in Parallel Computing, ISSN 0927-5452.
Papers are written conform the typing instructions and Word or LaTeX templates available on the authors guidelines page.
Venue
The conference will be held in the conference center of the Faculty of Mathematics & Physics, Charles University, Prague, Czech Republic.
Contact
All questions about submissions should be emailed to parafpga@elis.ugent.be