The upcoming exascale systems will impose new requirements on application developers and programming systems to target platforms with hundreds of homogeneous and heterogeneous cores. The four critical challenges for exascale systems are extreme parallelism, power demand, data movement, and reliability. These systems are aimed to solve problems that were previously out of reach and improve the parallel performance of applications by a factor of 50x. The power budget for achieving a billion billion (quintillion) floating-point operations per second (exaflops) should be within 20-30 MW. Moving the data on these systems relative to the computation will be challenging due to complex memory hierarchies. It would be essential to keep the CPUs/accelerators busy once they have the data to avoid memory bottlenecks. Failures on these systems are anticipated to occur many times a day, such that the existing approach for resiliency, such as checkpointing and restart, will not work.

The goal of this workshop is to attract leading researchers to exchange ideas and share their work-in-progress and latest results to address the exascale software challenges.

Submission Guidelines

The papers must not exceed 5 pages, including figures, tables, and references). Submissions should be formatted as single-spaced, double-column pages (IEEE format). The accepted papers will be invited for presentation at the workshop. However, these papers will NOT be published in the conference proceedings. This will allow the authors to publish an extended version of their paper at other venues after benefiting from reviewer feedback from the workshop. Papers will be judged on technical merit, quality, and relevance to the workshop. Plagiarism, in any form, especially verbatim reproduction from other published works, is prohibited. Papers that are plagiarized will be rejected, and the corresponding department and institution will be notified.

List of Topics

• High-level programming models for many-cores / accelerators

• Compilation techniques for hybrid CPU/accelerator parallelism

• Intra- / Inter-node load balancing and scheduling;

• Runtime systems for high performance and high productivity

• OS/runtime and system software for manycore systems, accelerators, and non-uniform memory hierarchy

• Scalable synchronization mechanisms

• Optimizing data locality and data movement

• Energy efficiency and optimizations

• Resilience and fault-tolerance

• Comparisons of runtime systems

• Applying machine learning techniques in HPC

• Scalable algorithms